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    <title>topic Access to RTC freezes OS in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-freezes-OS/m-p/346199#M47831</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I´m using i.MX6 in a custom board and having problems with the RTC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The SNVS_LPSRTCLR does not increase, freezing the operating system in the function "rtc_write_sync_lp".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static inline void rtc_write_sync_lp(void __iomem *ioaddr)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;unsigned int i, count1, count2, count3;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Wait for 3 CKIL cycles */&lt;/P&gt;&lt;P&gt;for (i = 0; i &amp;lt; 3; i++) {&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* TKT052983: Do consective reads of LSB of counter&lt;/P&gt;&lt;P&gt;* to ensure integrity&lt;/P&gt;&lt;P&gt;*/&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;count1 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;count2 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;} while (count1 != count2);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Now wait until counter value changes */&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;count2 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;count3 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;} while (count2 != count3);&lt;/P&gt;&lt;P&gt;} while (count3 == count1);&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The registers associated with SNVS (0x58 is LPTAR, 0x38 is LPCR, LPLR is 0x34):&lt;/P&gt;&lt;P&gt;0x00: 0x00000000&lt;/P&gt;&lt;P&gt;0x04: 0x80002100&lt;/P&gt;&lt;P&gt;0x08: 0x00000000&lt;/P&gt;&lt;P&gt;0x0C: 0x00000000&lt;/P&gt;&lt;P&gt;0x10: 0x00000000&lt;/P&gt;&lt;P&gt;0x14: 0x80000B00&lt;/P&gt;&lt;P&gt;0x18: 0x00000000&lt;/P&gt;&lt;P&gt;0x1C: 0x00000000&lt;/P&gt;&lt;P&gt;0x20: 0x00000000&lt;/P&gt;&lt;P&gt;0x24: 0x00000000&lt;/P&gt;&lt;P&gt;0x28: 0x00000000&lt;/P&gt;&lt;P&gt;0x2C: 0x00000000&lt;/P&gt;&lt;P&gt;0x30: 0x00000000&lt;/P&gt;&lt;P&gt;0x34: 0x000003FD&lt;/P&gt;&lt;P&gt;0x38: 0x00000020&lt;/P&gt;&lt;P&gt;0x3C: 0x00000000&lt;/P&gt;&lt;P&gt;0x40: 0x00000000&lt;/P&gt;&lt;P&gt;0x44: 0x00000000&lt;/P&gt;&lt;P&gt;0x48: 0x00000000&lt;/P&gt;&lt;P&gt;0x4C: 0x40000000&lt;/P&gt;&lt;P&gt;0x50: 0x00002A16&lt;/P&gt;&lt;P&gt;0x54: 0x112643A5&lt;/P&gt;&lt;P&gt;0x58: 0x542C224D&lt;/P&gt;&lt;P&gt;0x5C: 0x00000000&lt;/P&gt;&lt;P&gt;0x60: 0x00000000&lt;/P&gt;&lt;P&gt;0x64: 0x41736166&lt;/P&gt;&lt;P&gt;0x68: 0x00000000&lt;/P&gt;&lt;P&gt;0x6C: 0x00000000&lt;/P&gt;&lt;P&gt;0x70: 0x00000000&lt;/P&gt;&lt;P&gt;0x74: 0x00000000&lt;/P&gt;&lt;P&gt;0x78: 0x00000000&lt;/P&gt;&lt;P&gt;0x7C: 0x00000000&lt;/P&gt;&lt;P&gt;0x80: 0x00000000&lt;/P&gt;&lt;P&gt;0x84: 0x00000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The /proc/driver/rtc:&lt;/P&gt;&lt;P&gt;cat /proc/driver/rtc&lt;/P&gt;&lt;P&gt;rtc_time&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 15:48:28&lt;/P&gt;&lt;P&gt;rtc_date&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2014-10-01&lt;/P&gt;&lt;P&gt;alrm_time&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 15:48:29&lt;/P&gt;&lt;P&gt;alrm_date&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2014-10-01&lt;/P&gt;&lt;P&gt;alarm_IRQ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;alrm_pending&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;update IRQ enabled&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;periodic IRQ enabled&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;periodic IRQ frequency&amp;nbsp; : 1&lt;/P&gt;&lt;P&gt;max user IRQ frequency&amp;nbsp; : 64&lt;/P&gt;&lt;P&gt;24hr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : yes&lt;/P&gt;&lt;P&gt;alarm_IRQ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If the battery is removed and replaced the problem is solved ( i had 2 wih this problem, now have only one ).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I do not know what happened to these two boards and not know how to prevent it happening in the next, imagine what would be the tampers, but I understand that they are disabled. Any suggestions?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/karinavalencia"&gt;karinavalencia&lt;/A&gt; You can prioritize this thread?&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/bfac"&gt;bfac&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 23 Oct 2014 13:47:57 GMT</pubDate>
    <dc:creator>rafaelpita</dc:creator>
    <dc:date>2014-10-23T13:47:57Z</dc:date>
    <item>
      <title>Access to RTC freezes OS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-freezes-OS/m-p/346199#M47831</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I´m using i.MX6 in a custom board and having problems with the RTC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The SNVS_LPSRTCLR does not increase, freezing the operating system in the function "rtc_write_sync_lp".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static inline void rtc_write_sync_lp(void __iomem *ioaddr)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;unsigned int i, count1, count2, count3;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Wait for 3 CKIL cycles */&lt;/P&gt;&lt;P&gt;for (i = 0; i &amp;lt; 3; i++) {&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* TKT052983: Do consective reads of LSB of counter&lt;/P&gt;&lt;P&gt;* to ensure integrity&lt;/P&gt;&lt;P&gt;*/&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;count1 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;count2 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;} while (count1 != count2);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Now wait until counter value changes */&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;do {&lt;/P&gt;&lt;P&gt;count2 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;count3 = __raw_readl(ioaddr + SNVS_LPSRTCLR);&lt;/P&gt;&lt;P&gt;} while (count2 != count3);&lt;/P&gt;&lt;P&gt;} while (count3 == count1);&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The registers associated with SNVS (0x58 is LPTAR, 0x38 is LPCR, LPLR is 0x34):&lt;/P&gt;&lt;P&gt;0x00: 0x00000000&lt;/P&gt;&lt;P&gt;0x04: 0x80002100&lt;/P&gt;&lt;P&gt;0x08: 0x00000000&lt;/P&gt;&lt;P&gt;0x0C: 0x00000000&lt;/P&gt;&lt;P&gt;0x10: 0x00000000&lt;/P&gt;&lt;P&gt;0x14: 0x80000B00&lt;/P&gt;&lt;P&gt;0x18: 0x00000000&lt;/P&gt;&lt;P&gt;0x1C: 0x00000000&lt;/P&gt;&lt;P&gt;0x20: 0x00000000&lt;/P&gt;&lt;P&gt;0x24: 0x00000000&lt;/P&gt;&lt;P&gt;0x28: 0x00000000&lt;/P&gt;&lt;P&gt;0x2C: 0x00000000&lt;/P&gt;&lt;P&gt;0x30: 0x00000000&lt;/P&gt;&lt;P&gt;0x34: 0x000003FD&lt;/P&gt;&lt;P&gt;0x38: 0x00000020&lt;/P&gt;&lt;P&gt;0x3C: 0x00000000&lt;/P&gt;&lt;P&gt;0x40: 0x00000000&lt;/P&gt;&lt;P&gt;0x44: 0x00000000&lt;/P&gt;&lt;P&gt;0x48: 0x00000000&lt;/P&gt;&lt;P&gt;0x4C: 0x40000000&lt;/P&gt;&lt;P&gt;0x50: 0x00002A16&lt;/P&gt;&lt;P&gt;0x54: 0x112643A5&lt;/P&gt;&lt;P&gt;0x58: 0x542C224D&lt;/P&gt;&lt;P&gt;0x5C: 0x00000000&lt;/P&gt;&lt;P&gt;0x60: 0x00000000&lt;/P&gt;&lt;P&gt;0x64: 0x41736166&lt;/P&gt;&lt;P&gt;0x68: 0x00000000&lt;/P&gt;&lt;P&gt;0x6C: 0x00000000&lt;/P&gt;&lt;P&gt;0x70: 0x00000000&lt;/P&gt;&lt;P&gt;0x74: 0x00000000&lt;/P&gt;&lt;P&gt;0x78: 0x00000000&lt;/P&gt;&lt;P&gt;0x7C: 0x00000000&lt;/P&gt;&lt;P&gt;0x80: 0x00000000&lt;/P&gt;&lt;P&gt;0x84: 0x00000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The /proc/driver/rtc:&lt;/P&gt;&lt;P&gt;cat /proc/driver/rtc&lt;/P&gt;&lt;P&gt;rtc_time&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 15:48:28&lt;/P&gt;&lt;P&gt;rtc_date&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2014-10-01&lt;/P&gt;&lt;P&gt;alrm_time&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 15:48:29&lt;/P&gt;&lt;P&gt;alrm_date&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2014-10-01&lt;/P&gt;&lt;P&gt;alarm_IRQ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;alrm_pending&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;update IRQ enabled&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;periodic IRQ enabled&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;periodic IRQ frequency&amp;nbsp; : 1&lt;/P&gt;&lt;P&gt;max user IRQ frequency&amp;nbsp; : 64&lt;/P&gt;&lt;P&gt;24hr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : yes&lt;/P&gt;&lt;P&gt;alarm_IRQ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : no&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If the battery is removed and replaced the problem is solved ( i had 2 wih this problem, now have only one ).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I do not know what happened to these two boards and not know how to prevent it happening in the next, imagine what would be the tampers, but I understand that they are disabled. Any suggestions?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/karinavalencia"&gt;karinavalencia&lt;/A&gt; You can prioritize this thread?&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/bfac"&gt;bfac&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Oct 2014 13:47:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-freezes-OS/m-p/346199#M47831</guid>
      <dc:creator>rafaelpita</dc:creator>
      <dc:date>2014-10-23T13:47:57Z</dc:date>
    </item>
    <item>
      <title>Re: Access to RTC freezes OS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-freezes-OS/m-p/346200#M47832</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear, just to give an update on this request, I am working with the customer to understand this issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We now understand the SRTC lock issue is caused by the register &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.8000001907349px;"&gt;SNVS_&lt;/SPAN&gt;LPLR being locked, we are now working on different fronts to try capturing when this register is set, and if an internal source could be locking it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 14:52:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-freezes-OS/m-p/346200#M47832</guid>
      <dc:creator>bfac</dc:creator>
      <dc:date>2014-11-06T14:52:59Z</dc:date>
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