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    <title>topic Re: Serial Download Protocol on i.MX25 secure board in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341700#M46974</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Please look at the restrictions in section 5.4 (Core PLL Clock&lt;/P&gt;&lt;P&gt;Generation) of the i.MX25 Reference Manual. Also, pay attention on&lt;BR /&gt;the recent erratum ERR007917. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf?fasp=1" title="http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf?fasp=1"&gt;http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 30 Oct 2014 05:59:02 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2014-10-30T05:59:02Z</dc:date>
    <item>
      <title>Serial Download Protocol on i.MX25 secure board</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341696#M46970</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm using the iMX_Serial_Download_Protocol.py tool to download and execute a bootloader over SDP.&lt;/P&gt;&lt;P&gt;I've been testing with Engineering Mode boards, and know that my process works, but on a secure Production board, the download succeeds, but there is no evidence of a successful boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd like to diagnose the reason for the failure to boot, but the get_status SDP command does not appear to be providing valid results.&lt;/P&gt;&lt;P&gt;After downloading the file, the expected '88 88 88 88' response is returned.&lt;/P&gt;&lt;P&gt;After that, the get_status command does not return a valid HAB Status Code as expected.&amp;nbsp; Instead, each get_status request returns 2 or 3 bytes at a time instead of 4, with values such as:&lt;/P&gt;&lt;P&gt;53 7A 0D&lt;/P&gt;&lt;P&gt;D3 7A CF&lt;/P&gt;&lt;P&gt;D3 6A CF&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Eventually, the device seems to recover on its own, and get_status returns "F0 F0 F0 F0" again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What explanation might there be for SDP behaving this way?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Bryan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 22 Oct 2014 00:40:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341696#M46970</guid>
      <dc:creator>bryangreen</dc:creator>
      <dc:date>2014-10-22T00:40:57Z</dc:date>
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      <title>Re: Serial Download Protocol on i.MX25 secure board</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341697#M46971</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Please double check UART settings, needed for the SDP ; please refer to Table 7-17 (UART Configuration)&amp;nbsp;&amp;nbsp; &lt;BR /&gt;of the i.MX25 Reference Manual. Also,&amp;nbsp; according to section 7.3 (Using Serial Download Protocol to Test a &lt;BR /&gt;Secure Boot Image) of app note&amp;nbsp; AN4547 (Secure Boot on i.MX25, i.MX35, and i.MX51 using HABv3) :&lt;/P&gt;&lt;P&gt;"... the modifications of the clock tree are not recommended at this stage, because this could change the&lt;/P&gt;&lt;P&gt;frequency of the clock used by the UART, breaking the serial communication link". Perhaps UART&lt;BR /&gt;frequency was changed during initializations via the DCD table. After some time, because of watchdog, &lt;BR /&gt;boot ROM restarts and continue working.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Oct 2014 08:32:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341697#M46971</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-10-23T08:32:11Z</dc:date>
    </item>
    <item>
      <title>Re: Serial Download Protocol on i.MX25 secure board</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341698#M46972</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Yuri for your response.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My UART configuration seems to be correct.&amp;nbsp; SDP works fine and produces the 88 88 88 88 response as expected after sending down a file.&lt;/P&gt;&lt;P&gt;We also do not modify the clock during SDP.&amp;nbsp; Once SDP is complete, our binary has a DCD section which configures the clock, i.e.:&lt;/P&gt;&lt;P&gt;DCDGEN(25, 4, 0x53F80008, 0x20034000)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But at this point, SDP has completed.&amp;nbsp; I have tried removing this DCD entry, but the device does not seem to be able to boot without it.&lt;/P&gt;&lt;P&gt;However, the same process works fine on an unsecured Engineering mode board, but does not work on a Production board.&amp;nbsp; The only difference is the fuse configuration.&amp;nbsp; Since SDP download works in both cases, what difference could contribute to the lack of successful boot in the case of the Production board?&amp;nbsp; We are confident that the image is properly signed.&amp;nbsp; Interestingly, when I attempt to use a small unsigned bootloader, I get a 47 47 47 47 response, as expected.&amp;nbsp; But if I use a larger unsigned bootloader, I get garbage.&amp;nbsp; In fact, I have consistently found that file size has a significant impact on behavior.&amp;nbsp; The same goes for a bootloader that loads into internal ram.&amp;nbsp; If the bootloader is loaded starting at 0x78001c00 and is up to 120k in size, it boots (on a non-secure board).&amp;nbsp; But if loaded at 0x78000000, or if it is 121k or larger, it does not boot.&amp;nbsp; Can you indicate any documentation that might explain this subtle behavour?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Bryan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Oct 2014 20:18:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341698#M46972</guid>
      <dc:creator>bryangreen</dc:creator>
      <dc:date>2014-10-29T20:18:46Z</dc:date>
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      <title>Re: Serial Download Protocol on i.MX25 secure board</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341699#M46973</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've discovered an interesting detail.&amp;nbsp; As I mentioned, we have an entry in the DCD header of our binary to set the clock to 399MHZ:&lt;/P&gt;&lt;P&gt;DCDGEN(25, 4, 0x53F80008, 0x20034000)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found that when I remove that entry from an unsigned bootloader, SDP returns a status after loading of 35: "Signature verification failed".&amp;nbsp; But with that DCD entry, we get the usual garbage from SDP.&amp;nbsp; So that makes things very clear: when SDP download completes, the MX25 executes the DCD table before performing the HAB check.&amp;nbsp; When the HAB check fails, we cannot get the HAB status code back because the clock was modified during DCD processing.&amp;nbsp; My previous assumption had been that the DCD processing would be performed _after_ the HAB check.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I now need to produce a signed bootloader for SDP that does not set the clock in the DCD, but which is still able to boot.&amp;nbsp; Unfortunately, this unsigned version with the removed DCD entry does not boot successfully on an Engineering board.&amp;nbsp; Do you have a thought as to why this is, or how we could work around it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Bryan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Oct 2014 23:57:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341699#M46973</guid>
      <dc:creator>bryangreen</dc:creator>
      <dc:date>2014-10-29T23:57:00Z</dc:date>
    </item>
    <item>
      <title>Re: Serial Download Protocol on i.MX25 secure board</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341700#M46974</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Please look at the restrictions in section 5.4 (Core PLL Clock&lt;/P&gt;&lt;P&gt;Generation) of the i.MX25 Reference Manual. Also, pay attention on&lt;BR /&gt;the recent erratum ERR007917. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf?fasp=1" title="http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf?fasp=1"&gt;http://cache.freescale.com/files/32bit/doc/errata/IMX25CE.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Oct 2014 05:59:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/341700#M46974</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-10-30T05:59:02Z</dc:date>
    </item>
    <item>
      <title>This an automatic process.  We are marking this post as s...</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/1135882#M161119</link>
      <description>&lt;B&gt;This an automatic process.&lt;/B&gt;&lt;BR /&gt;&lt;BR /&gt;
We are marking this post as solved, due to the either low activity or any reply marked as correct.&lt;BR /&gt;&lt;BR /&gt;
If you have additional questions, please create a new post and reference to this closed post.&lt;BR /&gt;&lt;BR /&gt;
NXP Community!</description>
      <pubDate>Thu, 03 Sep 2020 14:57:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Serial-Download-Protocol-on-i-MX25-secure-board/m-p/1135882#M161119</guid>
      <dc:creator>CommunityBot</dc:creator>
      <dc:date>2020-09-03T14:57:17Z</dc:date>
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