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    <title>topic Re: i.MX6SL eMMC design in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341589#M46937</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp;&amp;nbsp; Please refer to Chapter 8 (System Boot) of the i.MX6 SL &lt;BR /&gt; Reference Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN style="font-size: 12.0pt; font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; In particular, please pay attention on the next :&lt;BR /&gt; Table 8-11 (USDHC Boot eFUSE Descriptions) ;&lt;BR /&gt; Table 8-14 (SD/MMC IOMUX Pin Configuration).&lt;BR /&gt; &lt;BR /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 19 Jan 2015 02:40:38 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2015-01-19T02:40:38Z</dc:date>
    <item>
      <title>i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341584#M46932</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear expert,&lt;/P&gt;&lt;P&gt;In i.MX6SL platform, we use eMMC for data storage. Do we need the pull-up resistors at the datas (data0 to 7) and CMD signal?&lt;/P&gt;&lt;P&gt;thanks,&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Alyssa &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jan 2015 02:21:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341584#M46932</guid>
      <dc:creator>alyssawu</dc:creator>
      <dc:date>2015-01-14T02:21:37Z</dc:date>
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    <item>
      <title>Re: i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341585#M46933</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 12.0pt; font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; There is no special requirement for external resistors pulling up regarding&lt;BR /&gt; the i.MX6 SL&amp;nbsp; eMMC interface. You may look at the i.MX6 SL EVK design schematic.&lt;BR /&gt; &lt;BR /&gt; According to JEDEC specs : &lt;BR /&gt; “JEDEC eMMC includes internal pull-up resistors for data lines DAT[7:1]. Immediately &lt;BR /&gt; after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the &lt;BR /&gt; DAT1 and DAT2 lines. (The DAT3 line internal pull-up is left connected.) Upon entering the 8-bit &lt;BR /&gt; mode, the device disconnects the internal pull-ups on the DAT1, DAT2, and DAT[7:4] lines.”&lt;BR /&gt; &lt;BR /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jan 2015 08:39:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341585#M46933</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-01-14T08:39:09Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341586#M46934</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;You mean that there is no need to add the pull-up resistor?&lt;/P&gt;&lt;P&gt;I will delete the resistor。&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jan 2015 09:04:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341586#M46934</guid>
      <dc:creator>alyssawu</dc:creator>
      <dc:date>2015-01-14T09:04:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341587#M46935</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jan 2015 09:17:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341587#M46935</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-01-14T09:17:41Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341588#M46936</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;In i.MX6SL platform, we use eMMC boot.&lt;/P&gt;&lt;P&gt;How do we set the boot_config1/2/4?&lt;/P&gt;&lt;P&gt;Thanks ,&lt;/P&gt;&lt;P&gt;alyssa:smileyconfused:&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 16 Jan 2015 02:45:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341588#M46936</guid>
      <dc:creator>alyssawu</dc:creator>
      <dc:date>2015-01-16T02:45:57Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SL eMMC design</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341589#M46937</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp;&amp;nbsp; Please refer to Chapter 8 (System Boot) of the i.MX6 SL &lt;BR /&gt; Reference Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN style="font-size: 12.0pt; font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; In particular, please pay attention on the next :&lt;BR /&gt; Table 8-11 (USDHC Boot eFUSE Descriptions) ;&lt;BR /&gt; Table 8-14 (SD/MMC IOMUX Pin Configuration).&lt;BR /&gt; &lt;BR /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Jan 2015 02:40:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SL-eMMC-design/m-p/341589#M46937</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-01-19T02:40:38Z</dc:date>
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