topic DDR3 Bit Swaaping in i.MX Processors

DDR3 Bit Swaaping

muralikrishna — Mon, 23 Mar 2015 04:32:12 GMT

We swapped the DDR3 bits as recommended.

How to map these bits to processor while initializing.

Re: DDR3 Bit Swaaping

igorpadykov — Mon, 23 Mar 2015 10:01:36 GMT

Hi Murali

there is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG also

below part of p.4 SPF-27392 Sabre Schematic i.MX6_SABRE_SDP_DESIGNFILES :

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

Re: DDR3 Bit Swaaping

muralikrishna — Mon, 23 Mar 2015 10:27:18 GMT

Hi igor,

Bit swapping in Hardware is taken care.

How to implement those bit swappings in software to write or read to DDR3

Murali

Re: DDR3 Bit Swaaping

igorpadykov — Mon, 23 Mar 2015 10:32:35 GMT

Hi Murali

in general it is not possible to implement bit swappings in software.

If you followed Freescale recommmendations, there is no need

for additional mapping or software reconfiguration,

Best regards

igor

Re: DDR3 Bit Swaaping

art — Mon, 23 Mar 2015 11:54:56 GMT

Also, when swapping the byte lanes, don't forget to route correctly the strobe and mask signals, i.e. DQMx, DQSx and DQSx_B, corresponding to these byte lanes.

Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

This an automatic process. We are marking this post as s...

CommunityBot — Thu, 03 Sep 2020 14:52:57 GMT

This an automatic process.

We are marking this post as solved, due to the either low activity or any reply marked as correct.

If you have additional questions, please create a new post and reference to this closed post.

NXP Community!