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    <title>i.MX ProcessorsのトピックRe: disable cache on DMA</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335392#M45552</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for your reply igor. On the i.mx6 I am using I think it is something to do with the clearing of L2 cache when DMA transferring to an SD card. When tracing through the code I see lots of L2 cache calls during a DMA transfer. It looks like this ARM note -&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="ArmCache.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/46215i48B58BDDA7E325C3/image-size/large?v=v2&amp;amp;px=999" role="button" title="ArmCache.png" alt="ArmCache.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just don't know how to stop all this cache activity when transferring to the SD card.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 Sep 2014 11:07:30 GMT</pubDate>
    <dc:creator>douglasbolton</dc:creator>
    <dc:date>2014-09-23T11:07:30Z</dc:date>
    <item>
      <title>disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335390#M45550</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Android JB 4.3&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am having issues when DMA'ing data to an SD card because the flushing etc of the caches is causing interrupts to be locked for long periods of time depending on the number of blocks sent. Is there anyway of disabling the cache when DMA'ing to the SD card.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Doug.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Sep 2014 12:21:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335390#M45550</guid>
      <dc:creator>douglasbolton</dc:creator>
      <dc:date>2014-09-22T12:21:12Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335391#M45551</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Douglas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I believe this is more related to OS cacheing as&lt;/P&gt;&lt;P&gt;described below&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://www.thomas-krenn.com/en/wiki/Linux_Page_Cache_Basics"&gt;http://www.thomas-krenn.com/en/wiki/Linux_Page_Cache_Basics&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://insights.oetiker.ch/linux/fadvise.html"&gt;http://insights.oetiker.ch/linux/fadvise.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 00:34:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335391#M45551</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-09-23T00:34:50Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335392#M45552</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for your reply igor. On the i.mx6 I am using I think it is something to do with the clearing of L2 cache when DMA transferring to an SD card. When tracing through the code I see lots of L2 cache calls during a DMA transfer. It looks like this ARM note -&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="ArmCache.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/46215i48B58BDDA7E325C3/image-size/large?v=v2&amp;amp;px=999" role="button" title="ArmCache.png" alt="ArmCache.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just don't know how to stop all this cache activity when transferring to the SD card.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 11:07:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335392#M45552</guid>
      <dc:creator>douglasbolton</dc:creator>
      <dc:date>2014-09-23T11:07:30Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335393#M45553</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Douglas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DMA is optional module in ARM cores, i.MX6 has not it&lt;/P&gt;&lt;P&gt;as well ACP. You can check DDI0388I_ cortex_a9 (on &lt;A href="http://www.arm.com/"&gt;www.arm.com&lt;/A&gt;),&lt;/P&gt;&lt;P&gt;Chapter 12 ARM Cortex A9 MPCore Platform (ARM) &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;IMX6DQRM&lt;/A&gt;&lt;/P&gt;&lt;P&gt;L2 operates together with core.&lt;/P&gt;&lt;P&gt;While uSDHC module has own DMA engine&amp;nbsp; - ADMA (it does not use L2)&lt;/P&gt;&lt;P&gt;it is described in Chapter 67 Ultra Secured Digital Host Controller (uSDHC).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 11:36:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335393#M45553</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-09-23T11:36:06Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335394#M45554</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks igor I'll check out your references.&lt;/P&gt;&lt;P&gt;I have checked and yes you are correct that the i.mx6 does not have an ACP unit.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If the uSDHC controller doesn't use L2 do you know why I am seeing all this L2 cache activity when I do a block transfer to the SD card ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Doug.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 12:35:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335394#M45554</guid>
      <dc:creator>douglasbolton</dc:creator>
      <dc:date>2014-09-23T12:35:03Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335395#M45555</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Douglas&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;probably arm core also participates in&lt;/P&gt;&lt;P&gt;sending/managing data to SD from user application.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 13:44:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335395#M45555</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-09-23T13:44:40Z</dc:date>
    </item>
    <item>
      <title>Re: disable cache on DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335396#M45556</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;thanks igor, I think you are correct. I'm trying to track this down just now.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Doug.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Sep 2014 07:36:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/disable-cache-on-DMA/m-p/335396#M45556</guid>
      <dc:creator>douglasbolton</dc:creator>
      <dc:date>2014-09-24T07:36:31Z</dc:date>
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