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    <title>i.MX Processors中的主题 Question, i.MX28 EMI/ additive latency</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX28-EMI-additive-latency/m-p/333979#M45304</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about i.MCX28 EMI/ additive latency.&lt;/P&gt;&lt;P&gt;In i.MX28 reference manual, it is said the EMI does not support ‘additive latency’.&lt;/P&gt;&lt;P&gt;In my understanding,&lt;/P&gt;&lt;P&gt;If one needs to add additive latency, then one has to add the additive latency into CASLAT and also WRLAT parameter.&lt;/P&gt;&lt;P&gt;Am I correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 Dec 2014 05:04:04 GMT</pubDate>
    <dc:creator>Aemj</dc:creator>
    <dc:date>2014-12-09T05:04:04Z</dc:date>
    <item>
      <title>Question, i.MX28 EMI/ additive latency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX28-EMI-additive-latency/m-p/333979#M45304</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about i.MCX28 EMI/ additive latency.&lt;/P&gt;&lt;P&gt;In i.MX28 reference manual, it is said the EMI does not support ‘additive latency’.&lt;/P&gt;&lt;P&gt;In my understanding,&lt;/P&gt;&lt;P&gt;If one needs to add additive latency, then one has to add the additive latency into CASLAT and also WRLAT parameter.&lt;/P&gt;&lt;P&gt;Am I correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Dec 2014 05:04:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX28-EMI-additive-latency/m-p/333979#M45304</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2014-12-09T05:04:04Z</dc:date>
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    <item>
      <title>Re: Question, i.MX28 EMI/ additive latency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX28-EMI-additive-latency/m-p/333980#M45305</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #333333; font-family: Arial, Helvetica, sans-serif; font-size: 12px; font-style: normal; font-weight: normal; text-align: start; text-indent: 0px;"&gt;&amp;nbsp;&amp;nbsp; Additive latency&amp;nbsp; (in the &lt;SPAN style="color: #333333; font-family: Arial, Helvetica, sans-serif; font-size: 12px; font-style: normal; font-weight: normal; text-align: start; text-indent: 0px;"&gt;JEDEC Specification) &lt;/SPAN&gt; allows a read or write command to be issued &lt;BR /&gt;immediately following the active command. In this sense we cannot&amp;nbsp; "add the additive latency"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #333333; font-family: Arial, Helvetica, sans-serif; font-size: 12px; font-style: normal; font-weight: normal; text-align: start; text-indent: 0px;"&gt;for i.MX28.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Dec 2014 06:05:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX28-EMI-additive-latency/m-p/333980#M45305</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-12-09T06:05:15Z</dc:date>
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