i.MX ProcessorsのトピックBooting problems

Booting problems

BigGosh — Sat, 02 Jun 2012 16:40:38 GMT

Hello,

I've compiled a new kernel for imx53 loco

I've transferred it on sd following some suggestion ? found in this forum but after some seconds on console I can see only "hex chars" instead of booting log.

Where Am I wrong?

thanks in advance

christian f.

Re: Booting problems

RashmiRamanna — Mon, 04 Jun 2012 10:30:30 GMT

Hi,

You getting the hexa chars before booting also or only after booting?

I think you need to change the serial console settings.

Are you using minicom?

Regards,

Rashmi

Re: Booting problems

BigGosh — Mon, 04 Jun 2012 11:20:24 GMT

Hi,

I get the hex chars during the boot.

I've attached the working boot log and the not working boot load.

I think I compiled the wrong serial module into the kernel ... but I don't know what to use. I tried also to use the config file available on the working system via /proc

Thanks

Christian F.

Re: Booting problems

ChaimA — Sun, 22 Jul 2012 12:05:36 GMT

Hi, MX53 QSB get stuck all the time (no common from terminal),

try both sdcards the BSD and the UBUNTU:

UBUNTU:

Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Bluetooth: BNEP filters: protocol multicast
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 2
regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_MEM on
regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_PRO on
regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_CORE on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO10 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO8 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO6 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO4 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO3 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO2 on
regulator_init_complete: incomplete constraints, leaving DA9052_LDO1 on
mxc_rtc mxc_rtc.0: setting system clock to 1970-01-01 00:00:00 UTC (0)
EXT3-fs: barriers not enabled
EXT3-fs (mmcblk0p1): warning: maximal mount count reached, running e2fsck is red
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p1): using internal journal
EXT3-fs (mmcblk0p1): recovery complete
EXT3-fs (mmcblk0p1): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:1.
Freeing init memory: 172K
init: ureadahead main process (1161) terminated with status 5
init: mounted-dev main process (1177) terminated with status 139
mountall: EveUnable to handle kernel paging request at virtual address 10000000
nt failed
pgd = df4c8000
[10000000] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

BSD:

EXT2-fs (mmcblk0p1): warning: mounting unchecked fs, running e2fsck is recommend
VFS: Mounted root (ext2 filesystem) on device 179:1.
Freeing init memory: 172K
starting pid 1165, tty '': '/etc/rc.d/rcS'
Mounting /proc and /sys
Starting the hotplug events dispatcher udevd
Synthesizing initial hotplug events
udevd-event[1435]: udev_rules_apply_format: unknown format variable '$_$env{ID_'
udevd-event[1464]: udev_rules_apply_format: unknown format variable '$_$env{ID_'

Re: Booting problems

Rooney — Tue, 24 Jul 2012 07:07:11 GMT

Hi!!

This problem is caused by the clock setting of the bootloader and your kernel. Ensure that in u-boot-2009.08/board/freescale/mx53_loco/lowlevel_init.S the uart uses pll2 as clock parent.

Search for:

/*change uart clk parent to pll2*/
   ldr r1, [r0, #CLKCTL_CSCMR1]
   and r1, r1, #0xfcffffff
   orr r1, r1, #0x01000000
   str r1, [r0, #CLKCTL_CSCMR1]

Check that the parent clock in v2.6.35.3/arch/arm/mach-mx5/clock.c for uart1 is set to uart_main_clk. The main clock should be PLL2.

static struct clk uart_main_clk = {
   .parent = &pll2_sw_clk,
   .get_rate = _clk_uart_get_rate,
   .set_parent = _clk_uart_set_parent,
   .flags = RATE_PROPAGATES,
};

static struct clk uart1_clk[] = {
   {
   .id = 0,
   .parent = &uart_main_clk,
   .secondary = &uart1_clk[1],
   .enable_reg = MXC_CCM_CCGR1,
   .enable_shift = MXC_CCM_CCGRx_CG4_OFFSET,
   .enable = _clk_enable,
   .disable = _clk_disable,
    [...]
};

To ensure that uart is running on PLL2 you could call "clk_set_parent(&uart_main_clk, &pll2_sw_clk)" in mx53_clocks_init().

Hope this helps!!