<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: ECSPI 1, CS 1 sf probe issue?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321787#M42972</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please double check all the IOMUX and PAD setting for the SPI pins. e.g. In the mx6_pins.h, please check the pad setting of the SPI pins that you are using is MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 01 Jul 2014 07:37:35 GMT</pubDate>
    <dc:creator>jimmychan</dc:creator>
    <dc:date>2014-07-01T07:37:35Z</dc:date>
    <item>
      <title>ECSPI 1, CS 1 sf probe issue?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321786#M42971</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;All,&lt;/P&gt;&lt;P&gt; I have a prototype board that has an i.MX6 Quad on it.&amp;nbsp; Similar to the sabrelite, I have implemented an SPI EEPROM (SST25V chipset) on the ECSPI 1 chip select 1.&amp;nbsp; I actually have two EEPROMs at both Chip select 0 and Chip Select 1 location.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I believe I am having a U boot issue but am uncertain as to the configuration mode that I should be in.&amp;nbsp; When I run "sf probe" in u boot, The output message is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, if I try to do an sf probe with any arguments U boot returns the message:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000&lt;/P&gt;&lt;P&gt;Failed to initialize SPI flash at 0:1"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can then run sf probe again and it says the first message where the SST25V is detected.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As this is a prototype Revision 0 and I have had it for all of 7 days, I thought I was having a hardware issue.&amp;nbsp; So I have attached my oscilloscope to the SST25V SPI pins.&amp;nbsp; In doing so I have found something odd and I am hoping someone has seen this and can chime in and say "no, you need to configure u boot to do..." (because I have not quite figured it out yet).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When the "sf probe" command is run by itself, I see all of the SPI signals sending/receiving data, chipselect and the clock.&amp;nbsp; As soon as I add an argument, I have no activity on the SPI channel.&amp;nbsp; I have tried doing "sf probe 0:1 1000000 0" which should probe ECSPI channel 1, chip select 1 at 1MHz in Mode 0.&amp;nbsp; However, I get nothing and have tried many combinations of this and not seen a single activity.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Has anyone seen and/or over come this?&amp;nbsp;&amp;nbsp; I am certain it is a U boot configuration as the sf probe command does work just fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the time,&lt;BR /&gt;John&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Jun 2014 19:15:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321786#M42971</guid>
      <dc:creator>repoman</dc:creator>
      <dc:date>2014-06-19T19:15:48Z</dc:date>
    </item>
    <item>
      <title>Re: ECSPI 1, CS 1 sf probe issue?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321787#M42972</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please double check all the IOMUX and PAD setting for the SPI pins. e.g. In the mx6_pins.h, please check the pad setting of the SPI pins that you are using is MUX_PAD_CTRL(MX6Q_ECSPI_PAD_CTRL).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Jul 2014 07:37:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321787#M42972</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2014-07-01T07:37:35Z</dc:date>
    </item>
    <item>
      <title>Re: ECSPI 1, CS 1 sf probe issue?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321788#M42973</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Jimmychan,&lt;/P&gt;&lt;P&gt; Thanks.&amp;nbsp; I double checked the pads and these were not directly the issue.&amp;nbsp; Basically, if you want to probe something other than the default sf probe (which worked fine).&amp;nbsp; Then the flag value for chip select is not a logical value (say 0.. 3) but a formulaic value based on the GPIO pin and a few other items.&amp;nbsp; This information can be found by searching where the #define CONFIG_SF_DEFAULT_CS (0|IMX_GPIO_NR(3,19)&amp;lt;&amp;lt;8) is set.&amp;nbsp; I looked up the Macro for IMX_GPIO_NR and the definition is a formula:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Found in arch/arm/include/asm/imx-common/gpio.h]&lt;/P&gt;&lt;P&gt;#define IMX_GPIO_NR(port,index) ( ((( port ) - 1)*32) + ((index)&amp;amp;31) )&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By finding this, I could then access any chip select as long as I knew the exact GPIO port and index (which I do).&amp;nbsp; My specific board has two on board EEPROMs which will eventually enable the ability to do other kinds of security checks for tampering.&amp;nbsp; However, I wanted to know that I could access both by sending something like sf probe &amp;lt;SPI bus #&amp;gt;:&amp;lt;CS #&amp;gt;, etc.&amp;nbsp; However, the &amp;lt;CS #&amp;gt; is not actually logical but derived by the IMX_GPIO_NR() value and then rolled left 8 positions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;R,&lt;BR /&gt;John&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Jul 2014 13:40:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321788#M42973</guid>
      <dc:creator>repoman</dc:creator>
      <dc:date>2014-07-01T13:40:46Z</dc:date>
    </item>
    <item>
      <title>Re: ECSPI 1, CS 1 sf probe issue?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321789#M42974</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This may useful for you:&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/message/394136#394136"&gt;https://community.freescale.com/message/394136#394136&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/message/405462#405462"&gt;https://community.freescale.com/message/405462#405462&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Jul 2014 05:24:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ECSPI-1-CS-1-sf-probe-issue/m-p/321789#M42974</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2014-07-02T05:24:25Z</dc:date>
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  </channel>
</rss>

