i.MX ProcessorsのトピックRe: i.mx6q PL1 to PL0 problem

[SOLVED]i.mx6q PL1 to PL0 problem

garyyin — Tue, 17 Jun 2014 12:00:33 GMT

In the kernel PL1 code, I want to switch to PL0 code. The PL0 code starts from 0x0000. Of courese it's a virtual address.

The related code is:

asm volatile

(

"msr cpsr_c, #0x10\n\t"

"mov r0, #0\n\t"

"mov pc, r0"

);

The code above works fine. But if I use SPSR to switch, an data-abort exception will be generated:

asm volatile

(

"msr spsr_c, #0x10\n\t"

"mov r0, #0\n\t"

"movs pc, r0"

);

The code above uses SPSR with mode switching. I can't find the reason why the exception is generated.

In my code, I am sure that the SPSR has not been accessed before.

------------------------

Solved, due to mmu config bug.

Re: i.mx6q PL1 to PL0 problem

garyyin — Tue, 17 Jun 2014 13:47:24 GMT

The method 2 of the code above runs failed in i.mx6q quad-core board.

I found a more strange problem that all the 2 methods in the code above run CORRECTLY in i.mx6d dual-core board!

Why?

Re: i.mx6q PL1 to PL0 problem

garyyin — Thu, 26 Jun 2014 11:32:57 GMT

Append more dump info:

Kernel address range: 0xC0000000 ~ 0xC0FFFFFF

App address range: 0x00000000 ~ 0x000FFFFF

All virtual address.

##DABORT EXCEPTION## CPU0 LR 0x00000000, adjusted LR AIFSR 0x00000000 ADFSR 0x00000000 IFAR 0xAC589A80 IFSR 0x00000000 DFAR 0xC0000000 DFSR 0x0000000F

Anyone know something about this problem? It had taken too much time to solve. I cant' do anything more.