topic Re: Memory copy with different distance between source and destination address have different performance in i.MX Processors

Memory copy with different distance between source and destination address have different performance

fchai — Tue, 08 Jul 2014 06:01:42 GMT

Memory copy with different distance between source and destination address have different performance:

Say, (pageid(src) - pageid(dst)) % 16 = M

If M == 0, the memory copy performance is the worst.

If M == 1 or M == 15, it is better.

If 2 <= M <= 14, it is best.

1) Both src and dst memory have continuous physcial page.

2) Both src and dst are page aligned.

3) I am using i.MX6Q sabrelite (seems similar behavior in i.MX6Q sabresd)

Could someone tell me why?

Thanks,

Re: Memory copy with different distance between source and destination address have different performance

Yuri — Tue, 08 Jul 2014 06:34:41 GMT

What memcpy function is used in the case ?
Are caches enabled / disbaled ?

Re: Memory copy with different distance between source and destination address have different performance

fchai — Tue, 08 Jul 2014 08:23:40 GMT

Thanks for your replay.

It is simple *dst++ = *src++;

Re: Memory copy with different distance between source and destination address have different performance

Yuri — Tue, 08 Jul 2014 09:23:07 GMT

Perhaps, ARM caches influence here. Strictly speaking Your approach is not very optimal,
please refer to the following :

"What is the fastest way to copy memory on a Cortex-A8?"

ARM Information Center

Have a great day,
Yuri

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Re: Memory copy with different distance between source and destination address have different performance

fchai — Wed, 09 Jul 2014 08:43:31 GMT

I got similar result by disabling the MMU. So this is not related to cache.

Re: Memory copy with different distance between source and destination address have different performance

Yuri — Thu, 10 Jul 2014 01:38:36 GMT

Why do not use special instructions (recommended by ARM) for memcpy ?

Your approach ( *dst++ = *src++;) - of course - is very simple, but defenitely

non-optimal.

Have a great day,
Yuri

Re: Memory copy with different distance between source and destination address have different performance

fchai — Thu, 10 Jul 2014 07:52:26 GMT

But this can not explain why the same copy (not optimized) have difference.

This is more detailed result by copy 640M memory (source memory cached):

If M == 0, finished in about 2.4 second.

If M == 1 or M == 15, finished in about 2.0 second.

If 2 <= M <= 14, finished in about 1.6 second.

I just confused by the different performance with different src/dst addresses.

Any idea?

Re: Memory copy with different distance between source and destination address have different performance

Yuri — Tue, 15 Jul 2014 07:52:40 GMT

It makes sense to look at assembler codes of (*dst++ = *src++;) and nearest code.

2.
You wrote about pageid(src) - what is pageid definition ?

3.
What DRAM (part number, Datasheet) is used in the case ?