<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: ENET-1588 PTP with hardware timestamp in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316579#M41950</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Matthew,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; The following answers for you as a reference:&lt;/P&gt;&lt;P&gt;----------------------------&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;About 1588 ts clock:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;1588 ts clock must come from GPIO_16/RGMII_TX_CTL PINs,&amp;nbsp; since you use RGMII mode, so the only method is from GPIO_16.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;From internal:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;SOC PLL6_enet -&amp;gt; GPIO_16 -&amp;gt; loopback to 1588 ts clk.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;From external:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;External clock (from phy/ OSC) -&amp;gt; GPIO_16 -&amp;gt; loopback to 1588 ts clk.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;25, 50, 100, 125 Mhz clock are all ok for 1588 ts clock&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;-----------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 15 Jul 2014 02:10:01 GMT</pubDate>
    <dc:creator>weidong_sun</dc:creator>
    <dc:date>2014-07-15T02:10:01Z</dc:date>
    <item>
      <title>ENET-1588 PTP with hardware timestamp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316578#M41949</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i.MX6 RGMII connect to Ethernet PHY with IEEE-1588 support&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Infos:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hardware Development Guide for i.MX6&lt;BR /&gt;Tabele 2-9 Gigabit Ethernet Recommendations&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Peter 17.04.2014&lt;BR /&gt;"Now back to the 1588 question. Does it mean that the IEEE 1588 needs a separate&lt;BR /&gt;50MHz clock which needs to go through GPIO_16 regardless whether where the&lt;BR /&gt;125MHz reference clock for the RGMII is routed?"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Weidong 26.05.2014&lt;BR /&gt;"1588 timer has compare function,&amp;nbsp; set ENET_TCCRn register to generate 1pps from 1588_eventx_out."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Justin 23.06.2014&lt;BR /&gt;"we are working with Freescale to get a releasable version of the required support firmware&lt;BR /&gt;available, but this may take some time - think three to six months from now"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"Hardware - you have to have one of the1588_event_out pins available from the iMX6 to get&lt;BR /&gt;the Event Out signal. This is specified in the iMX6 RM"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Are these hardware requirements for Linux Kernel higher 3.10 are correct?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;- 125MHz reference clock on ENET_REF_CLK from external oscillator or PHY&lt;BR /&gt;- A no connect GPIO_16 to use the internal 50MHz for time stamp clock&lt;BR /&gt;- connect for Master ENET_1588_EVENTx_OUT to external PHY for 1PPS&lt;BR /&gt;- connect for Slave ENET_1588_EVENTx_IN from external PHY for 1PPS&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Jul 2014 13:50:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316578#M41949</guid>
      <dc:creator>neusch</dc:creator>
      <dc:date>2014-07-07T13:50:39Z</dc:date>
    </item>
    <item>
      <title>Re: ENET-1588 PTP with hardware timestamp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316579#M41950</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Matthew,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; The following answers for you as a reference:&lt;/P&gt;&lt;P&gt;----------------------------&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;About 1588 ts clock:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;1588 ts clock must come from GPIO_16/RGMII_TX_CTL PINs,&amp;nbsp; since you use RGMII mode, so the only method is from GPIO_16.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;From internal:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;SOC PLL6_enet -&amp;gt; GPIO_16 -&amp;gt; loopback to 1588 ts clk.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;From external:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;External clock (from phy/ OSC) -&amp;gt; GPIO_16 -&amp;gt; loopback to 1588 ts clk.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;25, 50, 100, 125 Mhz clock are all ok for 1588 ts clock&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;-----------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Jul 2014 02:10:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316579#M41950</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2014-07-15T02:10:01Z</dc:date>
    </item>
    <item>
      <title>Re: ENET-1588 PTP with hardware timestamp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316580#M41951</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Weidong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks for the Information about the clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is a difference between hardware timestamp in MAC or in PHY and should be evaluate.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Jul 2014 06:33:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316580#M41951</guid>
      <dc:creator>neusch</dc:creator>
      <dc:date>2014-07-15T06:33:21Z</dc:date>
    </item>
    <item>
      <title>Re: ENET-1588 PTP with hardware timestamp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316581#M41952</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Weidong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your statement:&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #1f497d;"&gt;About 1588 ts clock:&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #1f497d;"&gt;1588 ts clock must come from GPIO_16/RGMII_TX_CTL PINs,&amp;nbsp; since you use RGMII mode, so the only method is from GPIO_16.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;Where does this specification come from?&amp;nbsp; I want to use external 1588 ts clock, and the reference manual does not document this GPIO_16 function?&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;Regards,&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;Greg Shay&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jul 2015 20:01:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316581#M41952</guid>
      <dc:creator>gregshay</dc:creator>
      <dc:date>2015-07-30T20:01:29Z</dc:date>
    </item>
    <item>
      <title>Re: ENET-1588 PTP with hardware timestamp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316582#M41953</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please use section 23.3 (External Signals) of the Reference Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;ENET_1588_EVENT signals are used for PPS signals. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Also, please be aware about item ERR005895 ENET ( ENET 1588 channel 2 &lt;BR /&gt;event capture mode not functional) of the Errata.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fassets%2Fdocuments%2Fdata%2Fen%2Ferrata%2FIMX6DQCE.pdf" rel="nofollow" target="_blank"&gt;http://www.nxp.com/assets/documents/data/en/errata/IMX6DQCE.pdf&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;As for the reference clock :&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1) External ENET clock source option: A 125 MHz reference clock is required to &lt;BR /&gt; feed the ENET_REF_CLK input.&lt;BR /&gt;2) On-chip ENET clock source option: A 125 MHz reference clock (derived from PLL6)&lt;BR /&gt; must feed the ENET_REF_CLK input.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please consult with Table 2-9 (Gigabit Ethernet Recommendations) of the &lt;BR /&gt;Hardware Development Guide for more details.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fcache.nxp.com%2Fassets%2Fdocuments%2Fdata%2Fen%2Fuser-guides%2FIMX6DQ6SDLHDG.pdf" rel="nofollow" target="_blank"&gt;http://cache.nxp.com/assets/documents/data/en/user-guides/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;Regards,&lt;/P&gt;&lt;P class=""&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Feb 2017 07:45:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-1588-PTP-with-hardware-timestamp/m-p/316582#M41953</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-02-20T07:45:24Z</dc:date>
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  </channel>
</rss>

