For DDR Memory word size 64 bits, which clock is connected upper 32 bits and which clock is connected lower 32 bits

muralikrishna — Wed, 02 Jul 2014 07:18:34 GMT

Hi All,

we need to achieve 64 bits word size. we are using 4 memory chips of 256MX16.

i.MX6 processor is generating two pairs of differentail clocks.

out of two pairs generated by processor which pair of the clock we need to connected Memory chips and what is the purpose of two pairs of differentail clocks.

Re: For DDR Memory word size 64 bits, which clock is connected upper 32 bits and which clock is connected lower 32 bits

Yuri — Wed, 02 Jul 2014 07:41:02 GMT

As for DRAM clocks : in default state both signals are the same and can be used for both (any)

CS0 or CS1 if this makes easier PCB design.

Have a great day,
Yuri

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topic For DDR Memory word size 64 bits, which clock is connected upper 32 bits and which clock is connected lower 32 bits in i.MX Processors

For DDR Memory word size 64 bits, which clock is connected upper 32 bits and which clock is connected lower 32 bits

Re: For DDR Memory word size 64 bits, which clock is connected upper 32 bits and which clock is connected lower 32 bits