IMX537 video problem under WINCE7 BSP

zhuyiwu — Wed, 04 Jun 2014 07:54:14 GMT

We have a IMX537 board with a ADV7180BSTZ chip. The WINCE7 BSP has been successfully installed, everything goes well except the video function. We found:

1, When CSI0 mode is set to "interlaced", there is no video output, also no IDMAC_EOF_0 interrupt is triggered.

2, When CSI0 mode is set to "progressive", the images flap upward and unstable.

3, When CSIO mode is set to "Gated Clock", the images are horizental mirrored.

the following list is the setting of CSI0 registers:

CSI 0 Registers

PID:00400002 TID:04D2004A Address d5290000 04008a30 027002cf 023f02cf 00000000

PID:00400002 TID:04D2004A Address d5290010 00000000 000d07df 00040596 00ff0000

PID:00400002 TID:04D2004A Address d5290020 ffffffff 00000000 00000000 00000000

PID:00400002 TID:04D2004A Address d5290030 00000000 00000000 00000000 00000000

PID:00400002 TID:04D2004A Address d5290040 00000000 00000000 00000000 00000000

PID:00400002 TID:04D2004A Address d5290050 00000000 00000000 00000000 00000000

Same video chip has been tested on the IMX357 board under WINCE6 environment without any problem.

For this, any one with any luck in IMX537?

BTW, could anyone explain the CSIO CCIR Code Register 1 ( IPU_CSI0_CCIR_CODE_1 ) to me? there is no detail explanation in the manual, such as the fields of:

CSI0_STRT_FLD0_ACTV

CSI0_END_FLD0_ACTV

CSI0_STRT_FLD0_BLNK_2ND

CSI0_END_FLD0_BLNK_2ND

CSI0_STRT_FLD0_BLNK_1ST

CSI0_END_FLD0_BLNK_1ST

Re: IMX537 video problem under WINCE7 BSP

karina_valencia — Fri, 27 Jun 2014 16:47:05 GMT

Please check my captured images for the register.

Regarding this issue " When CSI0 mode is set to "progressive", the images flap upward and unstable"

Would you please adjust the value of "CSI0_VSC" in the "IPU_CSI0_OUT_FRM_CTRL" register.

topic IMX537 video problem under WINCE7 BSP in i.MX Processors

IMX537 video problem under WINCE7 BSP

Re: IMX537 video problem under WINCE7 BSP