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    <title>i.MX Processors中的主题 Re: Boot issues with imx6</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313998#M41224</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;First, please try to test memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"i.MX6 DDR Stress Test Tool V1.0.2"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="32294" data-containertype="2020" data-objectid="96412" data-objecttype="102" href="https://community.freescale.com/docs/DOC-96412"&gt;https://community.freescale.com/docs/DOC-96412&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 04 Jun 2014 05:48:15 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2014-06-04T05:48:15Z</dc:date>
    <item>
      <title>Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313997#M41223</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm not really sure what the problem could be but we currently have a pretty big problem. Basically our custom boards have a pretty low yield due to a very random boot issue. Everything from unrecognized instruction to the system just halting during the boot process. I included some outputs below. The failures are pretty spread out and the only thing i can think of is we have some bad CPU's or maybe ddr. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;
&lt;P class="Standard"&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;
&lt;P class="Standard"&gt;Reset cause: POR&lt;/P&gt;
&lt;P class="Standard"&gt;Board: MX6Q-Camaro&lt;/P&gt;
&lt;P class="Standard"&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;
&lt;P class="Standard"&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0, FSL_SDHC: 1&lt;/P&gt;
&lt;P class="Standard"&gt;SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB&lt;/P&gt;
&lt;P class="Standard"&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;## Booting kernel from Legacy Image at 80800000 ...
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Name:&amp;nbsp;&amp;nbsp; Linux-3.0.35-ts-armv7l&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Type:&amp;nbsp;&amp;nbsp; ARM Linux Kernel Image (uncompressed)&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Data Size:&amp;nbsp;&amp;nbsp;&amp;nbsp; 3575448 Bytes = 3.4 MiB&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Load Address: 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Entry Point:&amp;nbsp; 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Verifying Checksum ... OK&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Loading Kernel Image ... OK&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;Starting kernel ...&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;Uncompressing Linux... done, booting the kernel.&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;Error: unrecognized/unsupported processor variant (0x412fc09a).&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;
&lt;P class="Standard"&gt;## Booting kernel from Legacy Image at 80800000 ...&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Name:&amp;nbsp;&amp;nbsp; Linux-3.0.35-ts-armv7l&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Type:&amp;nbsp;&amp;nbsp; ARM Linux Kernel Image (uncompressed)&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Data Size:&amp;nbsp;&amp;nbsp;&amp;nbsp; 3575448 Bytes = 3.4 MiB&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Load Address: 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Entry Point:&amp;nbsp; 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Verifying Checksum ... OK&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Loading Kernel Image ... OK&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;Starting kernel ...&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;Uncompressing Linux... done, booting the kernel.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;
&lt;P class="Standard"&gt;U-Boot 2013.07 (Mar 12 2014 - 11:46:23)&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;
&lt;P class="Standard"&gt;Reset cause: POR&lt;/P&gt;
&lt;P class="Standard"&gt;Board: MX6Q-Camaro&lt;/P&gt;
&lt;P class="Standard"&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;
&lt;P class="Standard"&gt;MMC:&amp;nbsp;&amp;nbsp; &lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;## Booting kernel from Legacy Image at 80800000 ...&lt;BR /&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Name:&amp;nbsp;&amp;nbsp; Linux-3.0.35-ts-armv7l&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Image Type:&amp;nbsp;&amp;nbsp; ARM Linux Kernel Image (uncompressed)&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Data Size:&amp;nbsp;&amp;nbsp;&amp;nbsp; 3575448 Bytes = 3.4 MiB&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Load Address: 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Entry Point:&amp;nbsp; 80008000&lt;/P&gt;
&lt;P class="Standard"&gt;&amp;nbsp;&amp;nbsp; Verifying Checksum ... Bad Data CRC&lt;/P&gt;
&lt;P class="Standard"&gt;ERROR: can't get kernel image!&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;
&lt;P class="Standard"&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;
&lt;P class="Standard"&gt;Reset cause: POR&lt;/P&gt;
&lt;P class="Standard"&gt;Board: MX6Q-Camaro&lt;/P&gt;
&lt;P class="Standard"&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;
&lt;P class="Standard"&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0, FSL_SDHC: 1&lt;/P&gt;
&lt;P class="Standard"&gt;SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB&lt;/P&gt;
&lt;P class="Standard"&gt;himport_r: can't insert "netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" ie&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;
&lt;P class="Standard"&gt;U-Boot 2013.07 (Mar 12 2014 - 11:46:23)&lt;/P&gt;
&lt;P class="Standard"&gt;&lt;/P&gt;
&lt;P class="Standard"&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;
&lt;P class="Standard"&gt;Reset cause: POR&lt;/P&gt;
&lt;P class="Standard"&gt;Board: MX6Q-Camaro&lt;/P&gt;
&lt;P class="Standard"&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;
&lt;P class="Standard"&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0, FSL_SDHC: 1&lt;/P&gt;
&lt;P class="Standard"&gt;SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Jun 2014 05:20:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313997#M41223</guid>
      <dc:creator>kevin_chaves</dc:creator>
      <dc:date>2014-06-04T05:20:51Z</dc:date>
    </item>
    <item>
      <title>Re: Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313998#M41224</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;First, please try to test memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"i.MX6 DDR Stress Test Tool V1.0.2"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="32294" data-containertype="2020" data-objectid="96412" data-objecttype="102" href="https://community.freescale.com/docs/DOC-96412"&gt;https://community.freescale.com/docs/DOC-96412&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Jun 2014 05:48:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313998#M41224</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-06-04T05:48:15Z</dc:date>
    </item>
    <item>
      <title>Re: Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313999#M41225</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm having a hard time getting this to work. I'm going to go verify the settings i'm using with my electrical team.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;C:\Users\User\Desktop\DDR_Stress_Tester_V1.0.2\Binary&amp;gt;DDR_Stress_Tester.exe -t mx6x -df imx6.inc -usb&lt;/P&gt;&lt;P&gt;MX6DQ opened.&lt;/P&gt;&lt;P&gt;dcd address 0x020bc000 out of valid range.&lt;/P&gt;&lt;P&gt;the addr out of valid range.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I don't think the part number changes anything. The 40 ohm resistors in blue, are those internal resistors to the imx6.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;TABLE border="0" cellspacing="0"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#C4BD97" colspan="2" height="21" style="border-top: 3px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-size: 12pt; font-family: Arial;"&gt;&lt;STRONG&gt;Device Information&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Manufacturer:&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Micron&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Memory part number:&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;MT42L256M32D2LG-18&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Memory type:&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;LPDDR2-1066&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM single die density (Gb)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM density per Channel (Gb)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM Bus Width&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;32&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Number of Chip Selects used per Channel&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM density per CS (Gb)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM Bus Width Per Channel&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;32&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Number of Banks&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;8&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Number of ROW Addresses&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;14&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Number of COLUMN Addresses&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;10&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#C4BD97" colspan="2" height="21" style="border-top: 3px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-size: 12pt; font-family: Arial;"&gt;&lt;STRONG&gt;System Information&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;i.Mx Part&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;i.Mx6Q&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;MMDC channels: &lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;MMDC0&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Bus Width&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;32&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM Clock Freq (MHz)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;528&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM Clock Cycle Time (ns)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#9BBB59" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;1.894&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="21" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;4KB Interleaving Mode&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#FFC000" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;Non-Interleave&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#C4BD97" colspan="2" height="21" style="border-top: 3px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-size: 12pt; font-family: Arial;"&gt;&lt;STRONG&gt;SI Configuration&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM DSE Setting - DQ/DQM (ohm)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#00B0F0" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;40&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM DSE Setting - ADDR/CMD/CTL (ohm)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#00B0F0" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;40&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM DSE Setting - CK (ohm)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#00B0F0" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;40&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD bgcolor="#D9D9D9" height="20" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 3px solid #000000; border-right: 1px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;DRAM DSE Setting - DQS (ohm)&lt;/SPAN&gt;&lt;/TD&gt;&lt;TD bgcolor="#00B0F0" style="border-top: 1px solid #000000; border-bottom: 1px solid #000000; border-left: 1px solid #000000; border-right: 3px solid #000000;"&gt;&lt;SPAN style="font-family: Arial;"&gt;40&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Jun 2014 13:34:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/313999#M41225</guid>
      <dc:creator>kevin_chaves</dc:creator>
      <dc:date>2014-06-10T13:34:48Z</dc:date>
    </item>
    <item>
      <title>Re: Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314000#M41226</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I noticed in the excel configuration, you have 8Gb as the single die density. Since the memory you are using has 2 die and the total density is 8Gb, the single die density should be 4Gb.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Jun 2014 01:14:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314000#M41226</guid>
      <dc:creator>sivaalagarsamy</dc:creator>
      <dc:date>2014-06-12T01:14:26Z</dc:date>
    </item>
    <item>
      <title>Re: Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314001#M41227</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt; This&amp;nbsp; thread &lt;/SPAN&gt;&lt;A href="https://community.nxp.com/thread/310755"&gt;Custom iMX6 board SDRAM DDR2 Config OpenOCD/JTAG&lt;/A&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp; may be useful to you. I noticed that the DRAM start address is 0x10000000 and not 0x80000000 &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Jun 2014 01:30:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314001#M41227</guid>
      <dc:creator>sivaalagarsamy</dc:creator>
      <dc:date>2014-06-12T01:30:11Z</dc:date>
    </item>
    <item>
      <title>Re: Boot issues with imx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314002#M41228</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;With more support we fixed the selections, but when running the stress test just stops and never finishes without any output.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" width="373"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD colspan="3" height="17" width="373"&gt;//=============================================================================&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// DDR Controller Registers&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD colspan="3" height="17"&gt;//=============================================================================&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Manufacturer:&lt;/TD&gt;&lt;TD class="xl64"&gt;Micron&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Device Part Number:&lt;/TD&gt;&lt;TD class="xl66" colspan="2"&gt;MT42L256M32D2LG-18 WT:A&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Clock Freq.:&lt;/TD&gt;&lt;TD class="xl64"&gt;533MHz&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Density per CS in Gb:&lt;/TD&gt;&lt;TD class="xl65"&gt;4&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Chip Selects used:&lt;/TD&gt;&lt;TD class="xl65"&gt;2&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Number of channels&lt;/TD&gt;&lt;TD class="xl65"&gt;1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Density per channel (Gb)&lt;/TD&gt;&lt;TD class="xl65"&gt;8&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Total DRAM density (Gb)&lt;/TD&gt;&lt;TD class="xl65"&gt;8&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Number of Banks:&lt;/TD&gt;&lt;TD class="xl65"&gt;8&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Row address:&lt;/TD&gt;&lt;TD class="xl65"&gt;14&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Column address:&lt;/TD&gt;&lt;TD class="xl65"&gt;10&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;// Data bus width&lt;/TD&gt;&lt;TD class="xl65"&gt;32&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD colspan="3" height="17"&gt;//=============================================================================&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Jun 2014 02:17:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-issues-with-imx6/m-p/314002#M41228</guid>
      <dc:creator>kevin_chaves</dc:creator>
      <dc:date>2014-06-12T02:17:37Z</dc:date>
    </item>
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