i.MX ProcessorsのトピックRe: LVDS and RGB Displays Design

LVDS and RGB Displays Design

rajniks — Fri, 04 Apr 2014 12:37:39 GMT

Most of the displays both LVDS and RGB that I have seen have a very stringent requirement that display signals and function signals need to high impedance or low in order to avoid internal circuit damage in the displays. Is there a way this can be ensured by programming the IMX6 processor to keep these line low or high impedance. Otherwise I need to provide an external buffers. I don't see this kind on design implementation on any Freescale boards.

Re: LVDS and RGB Displays Design

igorpadykov — Wed, 09 Apr 2014 08:02:50 GMT

Processor does not perform special actions for these display signals, that is at power up

they are inputs (100K impedance pull or keeper). Power up pads state one can find in Datasheet

section "Package Information and Contact Assignments".

Re: LVDS and RGB Displays Design

rajniks — Wed, 09 Apr 2014 10:50:14 GMT

I understand that part of it. I was more looking into some control register setting for the Display IOs that does this job.

Re: LVDS and RGB Displays Design

igorpadykov — Fri, 16 May 2014 07:38:31 GMT

Hi Raj

if you are speaking about i.MX6, it has not speical Display module settings

for settings IOs low at power-up. One can set them later after power-up.

Best regards

chip