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    <title>topic Re: i.MX6 PCIe bug (scheduling while atomic) in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309391#M40127</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 02 Jun 2014 17:18:38 GMT</pubDate>
    <dc:creator>EricNelson</dc:creator>
    <dc:date>2014-06-02T17:18:38Z</dc:date>
    <item>
      <title>i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309389#M40125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We got a very nice bug report from Naoki Aizu on our Github repository:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A href="https://github.com/boundarydevices/linux-imx6/issues/9" rel="nofollow noopener noreferrer" title="https://github.com/boundarydevices/linux-imx6/issues/9" target="_blank"&gt;imx6_pcie_link_up: scheduling while atomic · Issue #9 · boundarydevices/linux-imx6 · GitHub&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The details are also there, but the PCI_OP_WRITE macro is calling the imx6_pcie_link_up() routine while holding an IRQ spinlock. Since imx6_pcie_link_up() calls usleep_range(), this results in the following kernel message:&lt;/P&gt;&lt;PRE __default_attr="plain" __jive_macro_name="code" class="jive_text_macro jive_macro_code _jivemacro_uid_14015581603689827" jivemacro_uid="_14015581603689827"&gt;
&lt;P&gt;&lt;CODE style="font-family: Consolas, 'Liberation Mono', Courier, monospace; font-size: 12px;"&gt;PCI: enabling device 0000:01:00.0 (0140 -&amp;gt; 0142)
BUG: scheduling while atomic: udevd/163/0x00000002
Modules linked in: ath9k(+) ath9k_common ath9k_hw ath
CPU: 0 PID: 163 Comm: udevd Not tainted 3.10.17-1.0.0-wandboard-02558-g41aacad #13
[&amp;lt;80014600&amp;gt;] (unwind_backtrace+0x0/0xf8) from [&amp;lt;80011460&amp;gt;] (show_stack+0x10/0x14)
[&amp;lt;80011460&amp;gt;] (show_stack+0x10/0x14) from [&amp;lt;8065d720&amp;gt;] (__schedule_bug+0x44/0x5c)
[&amp;lt;8065d720&amp;gt;] (__schedule_bug+0x44/0x5c) from [&amp;lt;80663340&amp;gt;] (__schedule+0x4e4/0x58c)
[&amp;lt;80663340&amp;gt;] (__schedule+0x4e4/0x58c) from [&amp;lt;80662780&amp;gt;] (schedule_hrtimeout_range_clock+0xd8/0x144)
[&amp;lt;80662780&amp;gt;] (schedule_hrtimeout_range_clock+0xd8/0x144) from [&amp;lt;80033d84&amp;gt;] (usleep_range+0x48/0x50)
[&amp;lt;80033d84&amp;gt;] (usleep_range+0x48/0x50) from [&amp;lt;802a24d8&amp;gt;] (imx6_pcie_link_up+0x38/0x150)
[&amp;lt;802a24d8&amp;gt;] (imx6_pcie_link_up+0x38/0x150) from [&amp;lt;802a1898&amp;gt;] (dw_pcie_valid_config.isra.3+0x3c/0x8c)
[&amp;lt;802a1898&amp;gt;] (dw_pcie_valid_config.isra.3+0x3c/0x8c) from [&amp;lt;802a1bc0&amp;gt;] (dw_pcie_wr_conf+0x3c/0xf8)
[&amp;lt;802a1bc0&amp;gt;] (dw_pcie_wr_conf+0x3c/0xf8) from [&amp;lt;80291fdc&amp;gt;] (pci_bus_write_config_word+0x60/0x78)
[&amp;lt;80291fdc&amp;gt;] (pci_bus_write_config_word+0x60/0x78) from [&amp;lt;802950c4&amp;gt;] (__pci_set_master+0x50/0x64)
[&amp;lt;802950c4&amp;gt;] (__pci_set_master+0x50/0x64) from [&amp;lt;80298380&amp;gt;] (pci_set_master+0x10/0x1c)
[&amp;lt;80298380&amp;gt;] (pci_set_master+0x10/0x1c) from [&amp;lt;7f081bfc&amp;gt;] (ath_pci_probe+0xe4/0x2b4 [ath9k])
[&amp;lt;7f081bfc&amp;gt;] (ath_pci_probe+0xe4/0x2b4 [ath9k]) from [&amp;lt;80299750&amp;gt;] (pci_device_probe+0x74/0xac)
[&amp;lt;80299750&amp;gt;] (pci_device_probe+0x74/0xac) from [&amp;lt;8031b56c&amp;gt;] (driver_probe_device+0x104/0x214)
[&amp;lt;8031b56c&amp;gt;] (driver_probe_device+0x104/0x214) from [&amp;lt;8031b708&amp;gt;] (__driver_attach+0x8c/0x90)
[&amp;lt;8031b708&amp;gt;] (__driver_attach+0x8c/0x90) from [&amp;lt;80319da4&amp;gt;] (bus_for_each_dev+0x54/0x88)
[&amp;lt;80319da4&amp;gt;] (bus_for_each_dev+0x54/0x88) from [&amp;lt;8031ac90&amp;gt;] (bus_add_driver+0xd8/0x228)
[&amp;lt;8031ac90&amp;gt;] (bus_add_driver+0xd8/0x228) from [&amp;lt;8031bbbc&amp;gt;] (driver_register+0x78/0x144)
[&amp;lt;8031bbbc&amp;gt;] (driver_register+0x78/0x144) from [&amp;lt;7f088008&amp;gt;] (ath9k_init+0x8/0x2c [ath9k])
[&amp;lt;7f088008&amp;gt;] (ath9k_init+0x8/0x2c [ath9k]) from [&amp;lt;8000862c&amp;gt;] (do_one_initcall+0x34/0x15c)
[&amp;lt;8000862c&amp;gt;] (do_one_initcall+0x34/0x15c) from [&amp;lt;8006b8b0&amp;gt;] (load_module+0x1a44/0x1e5c)
[&amp;lt;8006b8b0&amp;gt;] (load_module+0x1a44/0x1e5c) from [&amp;lt;8006be10&amp;gt;] (SyS_finit_module+0x68/0x6c)
[&amp;lt;8006be10&amp;gt;] (SyS_finit_module+0x68/0x6c) from [&amp;lt;8000e080&amp;gt;] (ret_fast_syscall+0x0/0x30)
ieee80211 phy0: Atheros AR9462 Rev:2 mem=0xc0c00000, irq=155
=======================&lt;/CODE&gt;&lt;/P&gt;
&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This bug appears in all of the Freescale kernels we've looked at including the 3.10.31_1.1.0_alpha:&lt;/P&gt;&lt;P&gt;pci/access.c&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/pci/access.c?h=imx_3.10.31_1.1.0_alpha#n44" rel="nofollow noopener noreferrer" title="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/pci/access.c?h=imx_3.10.31_1.1.0_alpha#n44" target="_blank"&gt;linux-2.6-imx.git - Freescale i.MX Linux Tree&lt;/A&gt;&lt;/P&gt;&lt;P&gt;pci/host/pci-imx6.c&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/pci/host/pci-imx6.c?h=imx_3.10.31_1.1.0_alpha#n401" rel="nofollow noopener noreferrer" title="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/pci/host/pci-imx6.c?h=imx_3.10.31_1.1.0_alpha#n401" target="_blank"&gt;linux-2.6-imx.git - Freescale i.MX Linux Tree&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It appears that the delay is needed, so it's not clear how this should be addressed.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 31 May 2014 17:47:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309389#M40125</guid>
      <dc:creator>EricNelson</dc:creator>
      <dc:date>2014-05-31T17:47:33Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309390#M40126</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Eric,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our expert team it is reviewing your issue privatly , we will provide an answer&amp;nbsp; soon.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Jun 2014 15:54:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309390#M40126</guid>
      <dc:creator>jamesbone</dc:creator>
      <dc:date>2014-06-02T15:54:35Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309391#M40127</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Jun 2014 17:18:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309391#M40127</guid>
      <dc:creator>EricNelson</dc:creator>
      <dc:date>2014-06-02T17:18:38Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309392#M40128</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Comments from Richard:&lt;/P&gt;&lt;P&gt;The sleep should be replaced by the delay if it maybe used in the irq-context.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jun 2014 06:09:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309392#M40128</guid>
      <dc:creator>b47504</dc:creator>
      <dc:date>2014-06-05T06:09:45Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309393#M40129</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Yuan (and Richard).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not in a position to test, but hopefully provided the right info to Naoki:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A href="https://github.com/boundarydevices/linux-imx6/issues/9#issuecomment-45244915" title="https://github.com/boundarydevices/linux-imx6/issues/9#issuecomment-45244915"&gt;imx6_pcie_link_up: scheduling while atomic · Issue #9 · boundarydevices/linux-imx6 · GitHub&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jun 2014 16:53:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309393#M40129</guid>
      <dc:creator>EricNelson</dc:creator>
      <dc:date>2014-06-05T16:53:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 PCIe bug (scheduling while atomic)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309394#M40130</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;To close this out, it appears that changing the usleep_range() to udelay() addresses the issue:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/boundarydevices/linux-imx6/issues/9#issuecomment-45413171" title="https://github.com/boundarydevices/linux-imx6/issues/9#issuecomment-45413171"&gt;imx6_pcie_link_up: scheduling while atomic · Issue #9 · boundarydevices/linux-imx6 · GitHub&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 07 Jun 2014 15:51:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-PCIe-bug-scheduling-while-atomic/m-p/309394#M40130</guid>
      <dc:creator>EricNelson</dc:creator>
      <dc:date>2014-06-07T15:51:54Z</dc:date>
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