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    <title>i.MX ProcessorsのトピックRe: iMX 287 ethernet phy reset</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305754#M39288</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;what about using a different GPIO pin, lets said GPIO1 of the i.MX28 connect it to the PHY RESET pin, which it is the one already connected so both pins are at the same PHY REset pin, but since the GPIO1 it is not in the kernel can be modify in the application .&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 04 Apr 2014 16:10:34 GMT</pubDate>
    <dc:creator>jamesbone</dc:creator>
    <dc:date>2014-04-04T16:10:34Z</dc:date>
    <item>
      <title>iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305751#M39285</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;could somebody add something like that:&lt;/P&gt;&lt;P&gt;gpio_free(TX28_FEC_PHY_RESET);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;to kernel ethernet drive ? (mach-mxs.c)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our iMX 287 works in somewhat harsh environment and due to electric discharges nearby, there is necessity to reset eth phy time to time from linux user space.&lt;/P&gt;&lt;P&gt;This is unable due to locked proper gpio pin in kernel driver.&lt;/P&gt;&lt;P&gt;After adding piece of code mentioned above, we are able to reset phy. But is this really right way to do it ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;regards Klaban Jan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Mar 2014 08:47:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305751#M39285</guid>
      <dc:creator>janklaban</dc:creator>
      <dc:date>2014-03-28T08:47:48Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305752#M39286</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;could you please explain why these resets are necessary and what is your expected behavior of the i.MX287?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have you tried to compile the ethernet driver as module? So it's possible to unload and load it, which should result in a phy reset.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR Stefan Wahren&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Mar 2014 17:27:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305752#M39286</guid>
      <dc:creator>lategoodbye</dc:creator>
      <dc:date>2014-03-28T17:27:18Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305753#M39287</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;well, good point with having driver as module, i'll try it, but i think i'll have to shut down network interface before disabling module, but it could work&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;anyway, under some electromagnetic discharges case, ethernet stops working at all, interface sees eth line up, but nothing goes out or in, not a single bit&lt;/P&gt;&lt;P&gt;but after reseting phy, everything is ok again, so that is the reason why i would like to have that ability&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 31 Mar 2014 07:14:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305753#M39287</guid>
      <dc:creator>janklaban</dc:creator>
      <dc:date>2014-03-31T07:14:01Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305754#M39288</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;what about using a different GPIO pin, lets said GPIO1 of the i.MX28 connect it to the PHY RESET pin, which it is the one already connected so both pins are at the same PHY REset pin, but since the GPIO1 it is not in the kernel can be modify in the application .&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Apr 2014 16:10:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305754#M39288</guid>
      <dc:creator>jamesbone</dc:creator>
      <dc:date>2014-04-04T16:10:34Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305755#M39289</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;unofrtunately, this is not a way, PCB and circuits are already done, you know, phy is already placed on same PCB as cpu by manufacturer&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Apr 2014 16:17:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305755#M39289</guid>
      <dc:creator>janklaban</dc:creator>
      <dc:date>2014-04-04T16:17:31Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305756#M39290</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;OK, so then I think you need to modify the driver, so the this pin get out of the lock from the Kernel and then&amp;nbsp; handle as a module externally but seems too mucho maybe a rework from another GPIO still be a good option, lets said the same LED from the board or something like that&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Apr 2014 16:24:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305756#M39290</guid>
      <dc:creator>jamesbone</dc:creator>
      <dc:date>2014-04-04T16:24:27Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305757#M39291</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;From my point of view using a GPIO isn't a solution, because the ethernet driver must be notified about the reset to restore the necessary registers. The right approach would be to implement IOCTL in the driver to reset the PHY and call the IOCTL from user space. So you needn't to handle about locking and so on.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 05 Apr 2014 08:59:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305757#M39291</guid>
      <dc:creator>lategoodbye</dc:creator>
      <dc:date>2014-04-05T08:59:46Z</dc:date>
    </item>
    <item>
      <title>Re: iMX 287 ethernet phy reset</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305758#M39292</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;yes i agree&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i did it that way because i need it to be ready for a bit hostile environment, but i the future would be better solution via ioctl or something like that&lt;/P&gt;&lt;P&gt;unfortunately i'm not so good at kernel programing :smileyhappy:&lt;/P&gt;&lt;P&gt;i consider it a suggestion for a bit better usability in industrial environment&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;btw. we are using karo tx28 cpu module with two eth interface (but only with one phy), and second added phy is reseted via same gpio pin, so it could be a bit tricky to implement such ioctl, because reset will affect both eths&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Apr 2014 07:29:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX-287-ethernet-phy-reset/m-p/305758#M39292</guid>
      <dc:creator>janklaban</dc:creator>
      <dc:date>2014-04-07T07:29:00Z</dc:date>
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