i.MX ProcessorsのトピックRe: i.Mx6 Parallel CSI0 16bit bus width

i.Mx6 Parallel CSI0 16bit bus width

alessandroinnoc — Mon, 26 May 2014 16:53:57 GMT

Hi to all !

I am interfacing an ADV7403 to iMX6 DUAL using CSI0 port at 16bit bus width, but I also get

I always get the following kernel error message:

ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0.

Does anyone have any experience on such interfacing ?

Best Regards

Alessandro Innocenti

igorpadykov — Tue, 27 May 2014 06:13:21 GMT

Hi Alessandro

seems this configuration is not supported in kernel,

one can look at similar post below

In general new camera needs some support code, for

example ADV7180 below

Best regards

chip

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alessandroinnoc — Fri, 12 Sep 2014 16:20:36 GMT

Hi chip

we solved using CSI0 with a bus 8 bit wide and doubling the pixel clock.

Many thanks

ALessandro Innocenti