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    <title>i.MX ProcessorsのトピックeFuse lock bits with random setting</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305341#M39124</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;We are seeing an occasional issue where efuse address 0, OTP Bank0 Word0 (Lock controls), i.e., shadow register OCOTP_LOCK, does not contain the factory default value of 0x20220002.&amp;nbsp; Maybe 2 or 3 out of 100 processors will have other random bits set causing, for example the Ethernet MAC address to be locked and not writable.&amp;nbsp; We have seen 0x20220003, 0x20220012, 0x 20220202.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;We are reading and writing the fuses through a version of u-boot that is loaded over USB during factory test.&amp;nbsp; Thinking that u-boot’s efuse write function may have a bug, we added code to read the lock fuse before doing any fuse writes and we are reading bit errors there too making us think the processors may be coming from Freescale with random lock bits set in error.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Has anyone else seen anything like this problem before?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 27 Mar 2014 16:48:56 GMT</pubDate>
    <dc:creator>jschoen</dc:creator>
    <dc:date>2014-03-27T16:48:56Z</dc:date>
    <item>
      <title>eFuse lock bits with random setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305341#M39124</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;We are seeing an occasional issue where efuse address 0, OTP Bank0 Word0 (Lock controls), i.e., shadow register OCOTP_LOCK, does not contain the factory default value of 0x20220002.&amp;nbsp; Maybe 2 or 3 out of 100 processors will have other random bits set causing, for example the Ethernet MAC address to be locked and not writable.&amp;nbsp; We have seen 0x20220003, 0x20220012, 0x 20220202.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;We are reading and writing the fuses through a version of u-boot that is loaded over USB during factory test.&amp;nbsp; Thinking that u-boot’s efuse write function may have a bug, we added code to read the lock fuse before doing any fuse writes and we are reading bit errors there too making us think the processors may be coming from Freescale with random lock bits set in error.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Has anyone else seen anything like this problem before?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 16:48:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305341#M39124</guid>
      <dc:creator>jschoen</dc:creator>
      <dc:date>2014-03-27T16:48:56Z</dc:date>
    </item>
    <item>
      <title>Re: eFuse lock bits with random setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305342#M39125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This is for i.MX6Q&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 16:50:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305342#M39125</guid>
      <dc:creator>jschoen</dc:creator>
      <dc:date>2014-03-27T16:50:19Z</dc:date>
    </item>
    <item>
      <title>Re: eFuse lock bits with random setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305343#M39126</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hello,&lt;/P&gt;&lt;P&gt;Can you please provide more details?&lt;/P&gt;&lt;P&gt;1. Which U-boot version you are using?&lt;/P&gt;&lt;P&gt;2. What's your part numbers you are using?&lt;/P&gt;&lt;P&gt;3. What's your detailed steps to do fuse blown/read testing? Do you have full memory fuse dump information?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Apr 2014 05:45:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/eFuse-lock-bits-with-random-setting/m-p/305343#M39126</guid>
      <dc:creator>lily_zhang</dc:creator>
      <dc:date>2014-04-09T05:45:36Z</dc:date>
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