i.MX ProcessorsのトピックRe: PF0100A OTP

PF0100A OTP

satoshishimoda — Wed, 26 Mar 2014 04:14:08 GMT

Hi community,

I have a question about PF0100A OTP.

Please see Table 2 in MMPF0100 datasheet (Rev.7.0).

It says "It is required to set FUSE_POR1, FUSE_POR2, and FUSE_POR3 bits during OTP programming." in description of OTP_FUSE_PORx register setting during OTP programming.

I understand user should note this difference only when using MMPF0100NPAxx.

On the other hand, all MMPF0100FxAxx OTP is programmed before shipping, so FUSE_PORx bits have already been set to "1" for MMPF0100FxAxx when user get the chip.

So user can ignore this difference when using MMPF0100FxAxx.

Is my understanding correct?

Best Regards,

Satoshi Shimoda

Re: PF0100A OTP

jamesbone — Wed, 26 Mar 2014 15:56:24 GMT

Joshevelle, Can you please comment?

Re: PF0100A OTP

Joshevelle — Wed, 26 Mar 2014 17:47:40 GMT

Hello Satoshi,

You´re correct, the OTP_FUSE_PORx only applies for the PF0100 and PF0100A, the MMPF0100Fxxxx is already factory programmed, hence the final user can ignore table 2 since it only applies for PF0100 and PF0100A, not PF0100F.

Hope it helps!

Josh