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    <title>topic AUART RTS delay in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/AUART-RTS-delay/m-p/302836#M38435</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to use the AUART0 of the i.MX28 with the handshake signals. For this I am using the latest stable Linux Kernel 3.14.1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The AUART0 part of the device tree:&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;auart0: serial@8006a000 {&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; pinctrl-names = "default";&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; pinctrl-0 = &amp;lt;&amp;amp;auart0_pins_a&amp;gt;;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; fsl,uart-has-rtscts;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; status = "okay";&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the device tree uses all four pins of this UART. In Linux itself I configure the interface with:&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;stty -F /dev/ttyAPP0 raw 9600 -echo -echoe -echok -echoctl -echoke crtscts&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The UART and the handshake signals are working &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;in principle. But &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;I've noticed a delay between the RTS signal and the stopbit as you can see in the attached figure. I think that 13 ms are really unnecessary and I can not trace it back where they are from.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;I tried this too:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;stty -F /dev/ttyAPP0 raw 9600 -echo -echoe -echok -echoctl -echoke -crtscts&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;The bits CTSEN and RTSEN of the UARTAPP_CTRL2 register are toggled, but there is still a &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;something similar on the RTS lines, but now it os no CTS needed.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;So my questions are, where are this delays come from?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;How can I be sure who is toggling the RTS line (Linux or the i.MX28 hardware module) ?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;best regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 24 Apr 2014 13:11:58 GMT</pubDate>
    <dc:creator>chris321</dc:creator>
    <dc:date>2014-04-24T13:11:58Z</dc:date>
    <item>
      <title>AUART RTS delay</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/AUART-RTS-delay/m-p/302836#M38435</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to use the AUART0 of the i.MX28 with the handshake signals. For this I am using the latest stable Linux Kernel 3.14.1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The AUART0 part of the device tree:&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;auart0: serial@8006a000 {&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; pinctrl-names = "default";&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; pinctrl-0 = &amp;lt;&amp;amp;auart0_pins_a&amp;gt;;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; fsl,uart-has-rtscts;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt; status = "okay";&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the device tree uses all four pins of this UART. In Linux itself I configure the interface with:&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;stty -F /dev/ttyAPP0 raw 9600 -echo -echoe -echok -echoctl -echoke crtscts&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The UART and the handshake signals are working &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;in principle. But &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;I've noticed a delay between the RTS signal and the stopbit as you can see in the attached figure. I think that 13 ms are really unnecessary and I can not trace it back where they are from.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;I tried this too:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;stty -F /dev/ttyAPP0 raw 9600 -echo -echoe -echok -echoctl -echoke -crtscts&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;The bits CTSEN and RTSEN of the UARTAPP_CTRL2 register are toggled, but there is still a &lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;something similar on the RTS lines, but now it os no CTS needed.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;So my questions are, where are this delays come from?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;How can I be sure who is toggling the RTS line (Linux or the i.MX28 hardware module) ?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;SPAN class="short_text" lang="en"&gt;&lt;SPAN class="hps"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;best regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Apr 2014 13:11:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/AUART-RTS-delay/m-p/302836#M38435</guid>
      <dc:creator>chris321</dc:creator>
      <dc:date>2014-04-24T13:11:58Z</dc:date>
    </item>
    <item>
      <title>Re: AUART RTS delay</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/AUART-RTS-delay/m-p/302837#M38436</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I would suggest you to post this into linux-arm-kernel and linux-serial mailing lists.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Apr 2014 13:49:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/AUART-RTS-delay/m-p/302837#M38436</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2014-04-24T13:49:41Z</dc:date>
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