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    <title>i.MX ProcessorsのトピックRe: Re: i.MX6 UART connection.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302705#M38399</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;Very useful infos.&lt;/P&gt;&lt;P&gt;And Now I'm working on the i.mx6 solo.&lt;/P&gt;&lt;P&gt;What I want to do with uart4 is to configure&lt;/P&gt;&lt;P&gt;CSI0_DAT13 to UART4_TXD&lt;/P&gt;&lt;P&gt;CSI0_DAT12 to UART4_RXD&lt;/P&gt;&lt;P&gt;&amp;nbsp; I've already done sth about it, but it seems not working as expected, Could you tell me how to do this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;And FYI as a comparation, &lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;configure&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt; CSI0_DAT13 to UART4_RXD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt; CSI0_DAT12 to UART4_TXD,&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;and just crossing the hardware wiring TXD/RXD between imx6 solo and the device works as expected.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Following is what I've already done to configure CSI0_DAT13 to UART4_TXD&amp;nbsp; and&amp;nbsp; CSI0_DAT12 to UART4_RXD.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;With&amp;nbsp; the two pinmux in my board header file&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT12__UART4_RXD,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT13__UART4_TXD,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And their definitions are&lt;/P&gt;&lt;P&gt;#define MX6DL_PAD_CSI0_DAT12__UART4_RXD&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;/P&gt;&lt;P&gt;&amp;nbsp; IOMUX_PAD(0x0368, 0x0054, 3, 0x0914, 0, MX6DL_UART_PAD_CTRL)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define MX6DL_PAD_CSI0_DAT13__UART4_TXD&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;/P&gt;&lt;P&gt;&amp;nbsp; IOMUX_PAD(0x036C, 0x0058, 3, 0x0000, 0, MX6DL_UART_PAD_CTRL)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the log for running the function mxc_iomux_v3_setup_pad() in iomux-v3.c&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*&lt;/P&gt;&lt;P&gt;* configures a single pad in the iomuxer&lt;/P&gt;&lt;P&gt;*/&lt;/P&gt;&lt;P&gt;int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 mux_ctrl_ofs = (pad &amp;amp; MUX_CTRL_OFS_MASK) &amp;gt;&amp;gt; MUX_CTRL_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 mux_mode = (pad &amp;amp; MUX_MODE_MASK) &amp;gt;&amp;gt; MUX_MODE_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 sel_input_ofs = (pad &amp;amp; MUX_SEL_INPUT_OFS_MASK) &amp;gt;&amp;gt; MUX_SEL_INPUT_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 sel_input = (pad &amp;amp; MUX_SEL_INPUT_MASK) &amp;gt;&amp;gt; MUX_SEL_INPUT_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 pad_ctrl_ofs = (pad &amp;amp; MUX_PAD_CTRL_OFS_MASK) &amp;gt;&amp;gt; MUX_PAD_CTRL_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 pad_ctrl = (pad &amp;amp; MUX_PAD_CTRL_MASK) &amp;gt;&amp;gt; MUX_PAD_CTRL_SHIFT;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (mux_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(mux_mode, base + mux_ctrl_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (sel_input_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(sel_input, base + sel_input_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (!(pad_ctrl &amp;amp; NO_PAD_CTRL) &amp;amp;&amp;amp; pad_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(pad_ctrl, base + pad_ctrl_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // dat12&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if ((pad_ctrl_ofs == 0x0368) || (pad_ctrl_ofs == 0x036C) || (pad_ctrl_ofs == 0x0378) ||(pad_ctrl_ofs == 0x037C))&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (mux_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk("\n mux_ctrl_ofs(0x%x) mux_mode (0x%x) \n", mux_ctrl_ofs, mux_mode);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sel_input_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(" sel_input_ofs(0x%x) sel_input (0x%x) \n", sel_input_ofs, sel_input);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (!(pad_ctrl &amp;amp; NO_PAD_CTRL) &amp;amp;&amp;amp; pad_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(" pad_ctrl_ofs(0x%x) pad_ctrl (0x%x) \n", pad_ctrl_ofs, pad_ctrl);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; return 0;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;are as follows:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mux_ctrl_ofs(0x54) mux_mode (0x3)&lt;/P&gt;&lt;P&gt;sel_input_ofs(&lt;STRONG&gt;0x914&lt;/STRONG&gt;) sel_input (0x0)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pad_ctrl_ofs(&lt;STRONG&gt;0x368&lt;/STRONG&gt;) pad_ctrl (0x1b0b1)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mux_ctrl_ofs(0x58) mux_mode (0x3)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pad_ctrl_ofs(&lt;STRONG&gt;0x36c&lt;/STRONG&gt;) pad_ctrl (0x1b0b1)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking forward to your reply, thank you so much&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 01 Dec 2014 03:34:31 GMT</pubDate>
    <dc:creator>ShawnBai</dc:creator>
    <dc:date>2014-12-01T03:34:31Z</dc:date>
    <item>
      <title>i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302690#M38384</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi communty&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I got a report that UART I/F on a custom board did not work well from our customer.&lt;/P&gt;&lt;P&gt;So I checked UART setting and connection.&lt;/P&gt;&lt;P&gt;Then, according to &lt;A href="https://community.nxp.com/docs/DOC-97509"&gt;i.MX6: What does the DTE/DCE in i.MX6's UART do and how are RTS and CTS affected by the UARTxUFCR[DTEDCE] bit?&lt;/A&gt;, I understood the UART4 connection as "uart4.pdf" sheet.&lt;/P&gt;&lt;P&gt;Is this correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actually, the customer is using the connection described as "customer's connection" in the attached excel file.&lt;/P&gt;&lt;P&gt;If my understanding is correct, I think the customer should modify the connection as "Modification Plan" in the exel file.&lt;/P&gt;&lt;P&gt;Is this correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Apr 2014 08:02:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302690#M38384</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-04-24T08:02:28Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302691#M38385</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, I found my mistakes about modification plan.&lt;/P&gt;&lt;P&gt;The attache file "customer's connection2.xlsx" shows correct modification plan.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 25 Apr 2014 00:42:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302691#M38385</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-04-25T00:42:03Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302692#M38386</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 1, 04/2013, Charpter 64, Modem Control Signals&lt;/P&gt;&lt;P&gt;64.2.1.2.1 CTS - Clear To Send&lt;/P&gt;&lt;P&gt;Output in DCE mode. Input in DTE mode. This signal informs the remote modem that&lt;/P&gt;&lt;P&gt;UART is ready to receive data.&lt;/P&gt;&lt;P&gt;64.2.1.2.2 RTS - Request To Send&lt;/P&gt;&lt;P&gt;Input in DCE mode. Output in DTE mode. This signal informs UART that remote&lt;/P&gt;&lt;P&gt;modem is ready to receive data.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Please note that:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;RX and TX signals have nothing to do with DCE&amp;amp;DTE mode!!!&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;So, RX signal is always Input and TX is always Output.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Maybe, you should modify your Excel again!&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Apr 2014 05:01:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302692#M38386</guid>
      <dc:creator>tonyzheng</dc:creator>
      <dc:date>2014-04-28T05:01:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302693#M38387</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; &lt;STRONG&gt;Please note that:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; &lt;STRONG&gt;RX and TX signals have nothing to do with DCE&amp;amp;DTE mode!!!&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;gt; So, RX signal is always Input and TX is always Output.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;&lt;STRONG&gt; Maybe, you should modify your Excel again!&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I understood RX of "UART IP" is always input and TX of "UART IP" is always output but i.MX6 pad is not same, because DAISY bit in IOMUXC_UARTx_UART_RX DATA_SELECT_INPUT register can set to UARTx_TX_DATA.&lt;/P&gt;&lt;P&gt;And its description says "Route RX_DATA signal to pad when UART is in DCE mode. Route TX_DATA signal to pad when UART is in DTE mode."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimodau&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Apr 2014 09:58:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302693#M38387</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-04-30T09:58:09Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302694#M38388</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Satoshi&lt;/P&gt;&lt;P&gt;Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Jun 2014 03:42:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302694#M38388</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-06-20T03:42:48Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302695#M38389</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yixing Kong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; Had your issue got resolved?&lt;/P&gt;&lt;P&gt;Yes, UART is working correctly now.&lt;/P&gt;&lt;P&gt;But I have not understand UART module well.&lt;/P&gt;&lt;P&gt;So could you give me a reply to my post on Apr 30?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Jun 2014 09:27:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302695#M38389</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-06-23T09:27:00Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302696#M38390</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Satoshi-san&lt;/P&gt;&lt;P&gt;I am looking someone internally to help now. You will see something soon.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Jun 2014 08:04:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302696#M38390</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-06-24T08:04:18Z</dc:date>
    </item>
    <item>
      <title>Re: Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302697#M38391</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Shimoda&lt;/P&gt;&lt;P&gt;I'm sorry to reply it so late.&lt;/P&gt;&lt;P&gt;For example: &lt;STRONG&gt;IOMUXC_UART1_UART_RX_DATA_SELECT_INPUT&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Input Select (DAISY) Field&lt;/P&gt;&lt;P&gt;Selecting Pads Involved in Daisy Chain.&lt;/P&gt;&lt;P&gt;Route RX_DATA signal to pad when UART is in DCE mode. Route TX_DATA signal to pad when UART is in DTE mode.&lt;/P&gt;&lt;P&gt;00 CSI0_DATA10_ALT3 — Selecting ALT3 mode of pad CSI0_DAT10 for UART1_TX_DATA.&lt;/P&gt;&lt;P&gt;01 CSI0_DATA11_ALT3 — Selecting ALT3 mode of pad CSI0_DAT11 for UART1_RX_DATA.&lt;/P&gt;&lt;P&gt;10 SD3_DATA7_ALT1 — Selecting ALT1 mode of pad SD3_DAT7 for UART1_TX_DATA.&lt;/P&gt;&lt;P&gt;11 SD3_DATA6_ALT1 — Selecting ALT1 mode of pad SD3_DAT6 for UART1_RX_DATA.&lt;/P&gt;&lt;P&gt;In this case, more than one pad may drive a single module input pin. When UART is in DCE mode, the UART IP block will route RX_DATA signal to pad.&lt;/P&gt;&lt;P&gt;But please &lt;STRONG&gt;NOTE&lt;/STRONG&gt;:Selecting ALT3 mode of pad CSI0_DAT10 for UART1_TX_DATA and Selecting ALT1 mode of pad SD3_DAT7 for UART1_TX_DATA will be &lt;STRONG&gt;invalid&lt;/STRONG&gt;! Because the module pin is only RX_DATA signal.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;More in deeply&lt;/STRONG&gt;, UART FIFO Control Register (UARTx_UFCR) has a DCEDTE bit field as follows:&lt;/P&gt;&lt;P&gt;DCE/DTE mode select. Select UART as data communication equipment (DCE mode) or as data terminal&lt;/P&gt;&lt;P&gt;equipment (DTE mode).&lt;/P&gt;&lt;P&gt;0 DCE mode selected&lt;/P&gt;&lt;P&gt;1 DTE mode selected&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;When you set DCEDTE to 0, UART will be in DCE mode. Now, Daisy Chain routes RX_DATA signal to pad and there is only RX_DATA signal on input path. What you can select is 01 CSI0_DATA11_ALT3 and 11 SD3_DATA6_ALT1 for UART1_RX_DATA!!!&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Now, Do you have other questions?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If any questions, welcome to discuss with me!&lt;/P&gt;&lt;P&gt;regards,&lt;/P&gt;&lt;P&gt;Tao Zheng&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Jul 2014 08:50:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302697#M38391</guid>
      <dc:creator>tonyzheng</dc:creator>
      <dc:date>2014-07-04T08:50:47Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302698#M38392</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tao Zheng,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply, but sorry, I have been confused yet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; &lt;STRONG style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;When you set DCEDTE to 0, UART will be in DCE mode. Now, Daisy Chain routes RX_DATA signal to pad and there is only RX_DATA signal on input path. What you can select is 01 CSI0_DATA11_ALT3 and 11 SD3_DATA6_ALT1 for UART1_RX_DATA!!!&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;In this DCE mode, what pad is assigned to UART1_TX_DATA?&lt;/P&gt;&lt;P&gt;And how about in DTC mode?&lt;/P&gt;&lt;P&gt;What pad is assigned to UART1_RX_DATA and UART1_TX_DATA?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regard,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Jul 2014 07:56:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302698#M38392</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-07-10T07:56:06Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302699#M38393</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI Satoshi,&lt;/P&gt;&lt;P&gt;Please take a good look at &lt;STRONG&gt;Table 64-2. UART1 External Signals&lt;/STRONG&gt; in &lt;STRONG&gt;i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 1, 04/2013&lt;/STRONG&gt;, &lt;STRONG&gt;CSI0_DAT10(ALT3)&lt;/STRONG&gt; and &lt;STRONG&gt;SD3_DAT7(ALT1)&lt;/STRONG&gt; can be assigned to be UART1_TX_DATA!&lt;/P&gt;&lt;P&gt;In the DTE mode, it is similiar with DCE mode.&lt;/P&gt;&lt;P&gt;yours,&lt;/P&gt;&lt;P&gt;Tao Zheng&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Jul 2014 08:26:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302699#M38393</guid>
      <dc:creator>tonyzheng</dc:creator>
      <dc:date>2014-07-11T08:26:30Z</dc:date>
    </item>
    <item>
      <title>Re: Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302700#M38394</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tao Zheng,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;According to your reply, same pads (CSI0_DATA11_ALT3 or11 SD3_DATA6_ALT1 for RX,&amp;nbsp; CSI0_DAT10_ALT3 or SD3_DAT7_ALT1 for TX) are used even though UART mode is DTE or DCE, right?&lt;/P&gt;&lt;P&gt;If it is right, I feel the following table in &lt;A href="https://community.nxp.com/docs/DOC-97509"&gt;i.MX6: What does the DTE/DCE in i.MX6's UART do and how are RTS and CTS affected by the UARTxUFCR[DTEDCE] bit?&lt;/A&gt; is wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="border: 0px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: rgb(61, 61, 61); width: 497px;"&gt;&lt;TBODY style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" rowspan="2" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="92"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;IO port&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD colspan="2" nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="201"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;DTE mode&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD colspan="2" nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="204"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;DCE mode&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="62"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;direction&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="140"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;Uart IP port(internal)&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="63"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;direction&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="141"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;Uart IP port(internal)&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="92"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;UART_CTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="62"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;O&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="140"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;CTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="63"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;I&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="141"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;RTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="92"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;UART_RTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="62"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;I&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="140"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;RTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="63"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;O&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="141"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;CTS_B&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="92"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;UART_TXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="62"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;O&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="140"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;TXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="63"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;I&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="141"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;RXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border: 1pt solid windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="92"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;UART_RXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="62"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;I&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="140"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;RXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="63"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-size: 10pt; font-family: Arial, sans-serif; color: #575757;"&gt;O&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD nowrap="nowrap" style="padding: 0 5.4pt; border-right-width: 1pt; border-bottom-width: 1pt; border-style: none solid solid none; border-right-color: windowtext; border-bottom-color: windowtext; font-style: inherit; font-family: inherit;" valign="bottom" width="141"&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #575757;"&gt;TXD&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Jul 2014 05:07:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302700#M38394</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-07-18T05:07:42Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302701#M38395</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Tao, could you keep following this thread and reply the customer's question on 7/18?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Aug 2014 03:33:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302701#M38395</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-08-01T03:33:47Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302702#M38396</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Tao, could you keep following this thread and reply the customer's question on 7/18? We need to clsoe this DI as soon as possible. If you, for some reason, could not continue to help this issue please let me know.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/xiaoli.zhang"&gt;xiaoli.zhang&lt;/A&gt;, FYI&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Aug 2014 06:26:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302702#M38396</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-08-18T06:26:05Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302703#M38397</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Zheng Tao, could you finish this support issue and close it as soon as possible? If you need help please contact me.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 Sep 2014 05:55:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302703#M38397</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-09-02T05:55:38Z</dc:date>
    </item>
    <item>
      <title>Re: Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302704#M38398</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Saroshi-san,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Attached table is the UART I/O configuration in different modes from i.MX6DQ datasheet. As you can see, the port functions are reversed between DCE and DTE mode. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By default, BSP always configures the UART to DCE mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From the table, RXD and RTS are the input ports to UART in DCE mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For instance, let us try to mux the UART4 to CSI0 port.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SW_MUX_CTL_PAD_CSI0_DATA12 =&amp;nbsp; ALT3 (UART4_TX_DATA)&lt;/P&gt;&lt;P&gt;SW_MUX_CTL_PAD_CSI0_DATA13&amp;nbsp; = ALT3 (UART4_RX_DATA)&lt;/P&gt;&lt;P&gt;SW_MUX_CTL_PAD_CSI0_DATA16&amp;nbsp; = ALT3 (UART4_RTS_B)&lt;/P&gt;&lt;P&gt;SW_MUX_CTL_PAD_CSI0_DATA17&amp;nbsp; = ALT3 (UART4_CTS_B)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In DCE mode, pad CSI0_DATA13(UART4_RX_DATA) &amp;amp; CSI0_DATA16(UART4_RTS_B) will be the input pads involving in Daisy chain. Thus,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;UART4_UART_RX_DATA_SELECT_INPUT = 11b&amp;nbsp; (route UART4_RX_DATA to CSI0_DATA13)&lt;/P&gt;&lt;P&gt;UART4_UART_RTS_B_SELECT_INPUT = 0 (route UART4_RTS_B to CSI0_DATA16)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 Sep 2014 07:20:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302704#M38398</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2014-09-02T07:20:57Z</dc:date>
    </item>
    <item>
      <title>Re: Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302705#M38399</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;Very useful infos.&lt;/P&gt;&lt;P&gt;And Now I'm working on the i.mx6 solo.&lt;/P&gt;&lt;P&gt;What I want to do with uart4 is to configure&lt;/P&gt;&lt;P&gt;CSI0_DAT13 to UART4_TXD&lt;/P&gt;&lt;P&gt;CSI0_DAT12 to UART4_RXD&lt;/P&gt;&lt;P&gt;&amp;nbsp; I've already done sth about it, but it seems not working as expected, Could you tell me how to do this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;And FYI as a comparation, &lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;configure&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt; CSI0_DAT13 to UART4_RXD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt; CSI0_DAT12 to UART4_TXD,&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;and just crossing the hardware wiring TXD/RXD between imx6 solo and the device works as expected.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Following is what I've already done to configure CSI0_DAT13 to UART4_TXD&amp;nbsp; and&amp;nbsp; CSI0_DAT12 to UART4_RXD.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;With&amp;nbsp; the two pinmux in my board header file&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT12__UART4_RXD,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT13__UART4_TXD,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And their definitions are&lt;/P&gt;&lt;P&gt;#define MX6DL_PAD_CSI0_DAT12__UART4_RXD&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;/P&gt;&lt;P&gt;&amp;nbsp; IOMUX_PAD(0x0368, 0x0054, 3, 0x0914, 0, MX6DL_UART_PAD_CTRL)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define MX6DL_PAD_CSI0_DAT13__UART4_TXD&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;/P&gt;&lt;P&gt;&amp;nbsp; IOMUX_PAD(0x036C, 0x0058, 3, 0x0000, 0, MX6DL_UART_PAD_CTRL)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the log for running the function mxc_iomux_v3_setup_pad() in iomux-v3.c&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*&lt;/P&gt;&lt;P&gt;* configures a single pad in the iomuxer&lt;/P&gt;&lt;P&gt;*/&lt;/P&gt;&lt;P&gt;int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 mux_ctrl_ofs = (pad &amp;amp; MUX_CTRL_OFS_MASK) &amp;gt;&amp;gt; MUX_CTRL_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 mux_mode = (pad &amp;amp; MUX_MODE_MASK) &amp;gt;&amp;gt; MUX_MODE_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 sel_input_ofs = (pad &amp;amp; MUX_SEL_INPUT_OFS_MASK) &amp;gt;&amp;gt; MUX_SEL_INPUT_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 sel_input = (pad &amp;amp; MUX_SEL_INPUT_MASK) &amp;gt;&amp;gt; MUX_SEL_INPUT_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 pad_ctrl_ofs = (pad &amp;amp; MUX_PAD_CTRL_OFS_MASK) &amp;gt;&amp;gt; MUX_PAD_CTRL_OFS_SHIFT;&lt;/P&gt;&lt;P&gt;&amp;nbsp; u32 pad_ctrl = (pad &amp;amp; MUX_PAD_CTRL_MASK) &amp;gt;&amp;gt; MUX_PAD_CTRL_SHIFT;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (mux_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(mux_mode, base + mux_ctrl_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (sel_input_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(sel_input, base + sel_input_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; if (!(pad_ctrl &amp;amp; NO_PAD_CTRL) &amp;amp;&amp;amp; pad_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp; __raw_writel(pad_ctrl, base + pad_ctrl_ofs);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // dat12&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if ((pad_ctrl_ofs == 0x0368) || (pad_ctrl_ofs == 0x036C) || (pad_ctrl_ofs == 0x0378) ||(pad_ctrl_ofs == 0x037C))&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (mux_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk("\n mux_ctrl_ofs(0x%x) mux_mode (0x%x) \n", mux_ctrl_ofs, mux_mode);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sel_input_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(" sel_input_ofs(0x%x) sel_input (0x%x) \n", sel_input_ofs, sel_input);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (!(pad_ctrl &amp;amp; NO_PAD_CTRL) &amp;amp;&amp;amp; pad_ctrl_ofs)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(" pad_ctrl_ofs(0x%x) pad_ctrl (0x%x) \n", pad_ctrl_ofs, pad_ctrl);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; return 0;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;are as follows:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mux_ctrl_ofs(0x54) mux_mode (0x3)&lt;/P&gt;&lt;P&gt;sel_input_ofs(&lt;STRONG&gt;0x914&lt;/STRONG&gt;) sel_input (0x0)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pad_ctrl_ofs(&lt;STRONG&gt;0x368&lt;/STRONG&gt;) pad_ctrl (0x1b0b1)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mux_ctrl_ofs(0x58) mux_mode (0x3)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pad_ctrl_ofs(&lt;STRONG&gt;0x36c&lt;/STRONG&gt;) pad_ctrl (0x1b0b1)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking forward to your reply, thank you so much&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Dec 2014 03:34:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302705#M38399</guid>
      <dc:creator>ShawnBai</dc:creator>
      <dc:date>2014-12-01T03:34:31Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302706#M38400</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok, it seems&lt;/P&gt;&lt;P&gt;For DCE mode,&amp;nbsp;&amp;nbsp; only&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT12__UART4_TXD,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT13__UART4_RXD,&amp;nbsp; are valid.&lt;/P&gt;&lt;P&gt;For DTE mode,&amp;nbsp;&amp;nbsp; only&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT12__UART4_RXD,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6DL_PAD_CSI0_DAT13__UART4_TXD,&amp;nbsp; are valid.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Done.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Dec 2014 07:20:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302706#M38400</guid>
      <dc:creator>ShawnBai</dc:creator>
      <dc:date>2014-12-01T07:20:02Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 UART connection.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302707#M38401</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The recipe that worked for me to swap UART[0] RX and TX pins in iMX6Q:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Pin Assignments:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static iomux_v3_cfg_t mx6_iwg15m_q7_pads[] = &lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // NOTE: must also set UART to use DTE mode!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6Q_PAD_CSI0_DAT10__UART1_RXD,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6Q_PAD_CSI0_DAT11__UART1_TXD,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;...&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;}&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;STRONG&gt;UART initialization:&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;// Set DCEDTE flag to set UART into DTE mode to swap TX/RX pins&lt;/P&gt;&lt;P&gt;static const struct imxuart_platform_data mx6_iwg15m_q7_uart0_data __initconst = {&lt;/P&gt;&lt;P&gt;&amp;nbsp; .flags&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = IMXUART_USE_DCEDTE&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static inline void mx6_iwg15m_q7_init_uart(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; imx6q_add_imx_uart(0, &amp;amp;mx6_iwg15m_q7_uart0_data);&lt;/P&gt;&lt;P&gt;&amp;nbsp; imx6q_add_imx_uart(1, NULL);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; // unused&lt;/P&gt;&lt;P&gt;// imx6q_add_imx_uart(2, NULL);&lt;/P&gt;&lt;P&gt;// imx6q_add_imx_uart(3, NULL);&lt;/P&gt;&lt;P&gt;// imx6q_add_imx_uart(4, NULL);&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Jan 2015 22:08:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-UART-connection/m-p/302707#M38401</guid>
      <dc:creator>davidwood</dc:creator>
      <dc:date>2015-01-23T22:08:21Z</dc:date>
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