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    <title>i.MX ProcessorsのトピックIMX6Q Interlaced TVIN bt656</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302482#M38362</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am working with a custom board based on the IMX6Q SaberSD.&amp;nbsp; Our board uses the 8-bit bt656 parallel input (without external HS/VS) and 8-bit bt656 output with interlaced NTSC video.&amp;nbsp;&amp;nbsp; I got the output working from the patch (&lt;A href="https://community.nxp.com/docs/DOC-94019"&gt;Patch to Support BT656 and BT1120 Output For i.MX6 BSP&lt;/A&gt;) but, am struggling with the parallel input.&amp;nbsp; I used the adv7180 driver as a reference and made a few modification to configure parallel mode and interlaced.&amp;nbsp; In the function ioctl_g_ifparm I set the "p-&amp;gt;u.bt656.bt_sync_correct = 0;" to use internal syncs and set "p-&amp;gt;u.bt656.clock_curr = 0;" so mxc_v4l2_capture.c will use IPU_CSI_CLK_MODE_CCIR656_INTERLACED.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Testing the video capture and preview with " /unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 1 -ol 1 -f UYVY" there are a few issues with the video.&lt;/P&gt;&lt;P&gt;- It is continuously rolling vertically&lt;/P&gt;&lt;P&gt;- Colours are incorrect.&amp;nbsp; It looks like it is drawing in the wrong color space?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;//My output device tree entry&lt;/P&gt;&lt;P&gt;bt656@0 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fsl,bt656";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; disp_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; default_ifmt = "BT656";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ipu1_1&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;//My input device tree entry&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; bt656In {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fsl,bt656in";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ipu1_2&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks = &amp;lt;&amp;amp;clks 201&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-names = "csi_mclk";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; csi_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk = &amp;lt;27000000&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk_source = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there a problem with this configuration?&amp;nbsp; The only warning message printed is "imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001".&amp;nbsp; Below is the log of the mxc_v4l2_tvin.out test.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sincerely,&lt;/P&gt;&lt;P&gt;Matthew&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 0 -ol 1 -f UYVY&lt;BR /&gt;TV decoder chip is bt656_tvinIn mxc_v4l2_s_std b000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In mxc_v4l2_s_std b000&lt;BR /&gt;driver=mxc_vout, card=DISP3 FG, bus=, version=0x00030a11, capabilities=0x04000002&lt;BR /&gt;fmt RGB565: fourcc = 0x50424752&lt;BR /&gt;fmt BGR24: fourcc = 0x33524742&lt;BR /&gt;fmt RGB24: fourcc = 0x33424752&lt;BR /&gt;fmt RGB32: fourcc = 0x34424752&lt;BR /&gt;fmt BGR32: fourcc = 0x34524742&lt;BR /&gt;fmt NV12: fourcc = 0x3231564e&lt;BR /&gt;fmt UYVY: fourcc = 0x59565955&lt;BR /&gt;fmt YUYV: fourcc = 0x56595559&lt;BR /&gt;fmt YUV422 planar: fourcc = 0x50323234&lt;BR /&gt;fmt YUV444: fourcc = 0x34343459&lt;BR /&gt;fmt YUV420: fourcc = 0x32315559&lt;BR /&gt;fmt YVU420: fourcc = 0x32315659&lt;BR /&gt;fmt TILED NV12P: fourcc = 0x50564e54&lt;BR /&gt;fmt TILED NV12F: fourcc = 0x46564e54&lt;BR /&gt;fmt YUV444 planar: fourcc = 0x50343434&lt;BR /&gt;start time = 1398310913 s, 967905 us&lt;BR /&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001&lt;BR /&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Edit&lt;/P&gt;&lt;P&gt;On further investigation I don't believe the foreground buffer, fb1 is initialized correctly. &lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/name&lt;/P&gt;&lt;P&gt;DISP3 FG&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/mode&lt;/P&gt;&lt;P&gt;&amp;lt;empty.&amp;gt;&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/modes&lt;/P&gt;&lt;P&gt;U:712x480p-13&lt;BR /&gt;U:240x320p-60&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the device tree I had set disp_dev = "off"; to mxcfb2, mxcfb3 and mxcfb3.&amp;nbsp; I am going to try to re-enable the hdmi device on mxcfb2.&amp;nbsp; Hopefully,&amp;nbsp; that will initialize the buffer and correct the video preview.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Edit 2:&lt;/P&gt;&lt;P&gt;A colour space conversion from the UYVY foreground layer to the bt656 RGB565 output seems to be the problem.&amp;nbsp; I got the foreground layer to display with correct colours by changing the fbpix format from RGB565 to UYVY16 using u-boot variables.&amp;nbsp; However, as a consequence the background layer does not draw correct, since it needs to be RGB565.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In u-boot I changed the video variable from&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565&lt;/P&gt;&lt;P&gt;to&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I am still not sure how to configure the system so the background and overlay display correct.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 24 Apr 2014 03:56:01 GMT</pubDate>
    <dc:creator>matthewreynolds</dc:creator>
    <dc:date>2014-04-24T03:56:01Z</dc:date>
    <item>
      <title>IMX6Q Interlaced TVIN bt656</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302482#M38362</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am working with a custom board based on the IMX6Q SaberSD.&amp;nbsp; Our board uses the 8-bit bt656 parallel input (without external HS/VS) and 8-bit bt656 output with interlaced NTSC video.&amp;nbsp;&amp;nbsp; I got the output working from the patch (&lt;A href="https://community.nxp.com/docs/DOC-94019"&gt;Patch to Support BT656 and BT1120 Output For i.MX6 BSP&lt;/A&gt;) but, am struggling with the parallel input.&amp;nbsp; I used the adv7180 driver as a reference and made a few modification to configure parallel mode and interlaced.&amp;nbsp; In the function ioctl_g_ifparm I set the "p-&amp;gt;u.bt656.bt_sync_correct = 0;" to use internal syncs and set "p-&amp;gt;u.bt656.clock_curr = 0;" so mxc_v4l2_capture.c will use IPU_CSI_CLK_MODE_CCIR656_INTERLACED.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Testing the video capture and preview with " /unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 1 -ol 1 -f UYVY" there are a few issues with the video.&lt;/P&gt;&lt;P&gt;- It is continuously rolling vertically&lt;/P&gt;&lt;P&gt;- Colours are incorrect.&amp;nbsp; It looks like it is drawing in the wrong color space?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;//My output device tree entry&lt;/P&gt;&lt;P&gt;bt656@0 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fsl,bt656";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; disp_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; default_ifmt = "BT656";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ipu1_1&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;//My input device tree entry&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; bt656In {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fsl,bt656in";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ipu1_2&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks = &amp;lt;&amp;amp;clks 201&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-names = "csi_mclk";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; csi_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk = &amp;lt;27000000&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk_source = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there a problem with this configuration?&amp;nbsp; The only warning message printed is "imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001".&amp;nbsp; Below is the log of the mxc_v4l2_tvin.out test.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sincerely,&lt;/P&gt;&lt;P&gt;Matthew&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 0 -ol 1 -f UYVY&lt;BR /&gt;TV decoder chip is bt656_tvinIn mxc_v4l2_s_std b000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In mxc_v4l2_s_std b000&lt;BR /&gt;driver=mxc_vout, card=DISP3 FG, bus=, version=0x00030a11, capabilities=0x04000002&lt;BR /&gt;fmt RGB565: fourcc = 0x50424752&lt;BR /&gt;fmt BGR24: fourcc = 0x33524742&lt;BR /&gt;fmt RGB24: fourcc = 0x33424752&lt;BR /&gt;fmt RGB32: fourcc = 0x34424752&lt;BR /&gt;fmt BGR32: fourcc = 0x34524742&lt;BR /&gt;fmt NV12: fourcc = 0x3231564e&lt;BR /&gt;fmt UYVY: fourcc = 0x59565955&lt;BR /&gt;fmt YUYV: fourcc = 0x56595559&lt;BR /&gt;fmt YUV422 planar: fourcc = 0x50323234&lt;BR /&gt;fmt YUV444: fourcc = 0x34343459&lt;BR /&gt;fmt YUV420: fourcc = 0x32315559&lt;BR /&gt;fmt YVU420: fourcc = 0x32315659&lt;BR /&gt;fmt TILED NV12P: fourcc = 0x50564e54&lt;BR /&gt;fmt TILED NV12F: fourcc = 0x46564e54&lt;BR /&gt;fmt YUV444 planar: fourcc = 0x50343434&lt;BR /&gt;start time = 1398310913 s, 967905 us&lt;BR /&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001&lt;BR /&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Edit&lt;/P&gt;&lt;P&gt;On further investigation I don't believe the foreground buffer, fb1 is initialized correctly. &lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/name&lt;/P&gt;&lt;P&gt;DISP3 FG&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/mode&lt;/P&gt;&lt;P&gt;&amp;lt;empty.&amp;gt;&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb1/modes&lt;/P&gt;&lt;P&gt;U:712x480p-13&lt;BR /&gt;U:240x320p-60&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the device tree I had set disp_dev = "off"; to mxcfb2, mxcfb3 and mxcfb3.&amp;nbsp; I am going to try to re-enable the hdmi device on mxcfb2.&amp;nbsp; Hopefully,&amp;nbsp; that will initialize the buffer and correct the video preview.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Edit 2:&lt;/P&gt;&lt;P&gt;A colour space conversion from the UYVY foreground layer to the bt656 RGB565 output seems to be the problem.&amp;nbsp; I got the foreground layer to display with correct colours by changing the fbpix format from RGB565 to UYVY16 using u-boot variables.&amp;nbsp; However, as a consequence the background layer does not draw correct, since it needs to be RGB565.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In u-boot I changed the video variable from&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565&lt;/P&gt;&lt;P&gt;to&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I am still not sure how to configure the system so the background and overlay display correct.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Apr 2014 03:56:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302482#M38362</guid>
      <dc:creator>matthewreynolds</dc:creator>
      <dc:date>2014-04-24T03:56:01Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6Q Interlaced TVIN bt656</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302483#M38363</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I was able to fix the vertical video scrolling by changing&amp;nbsp; active _top = 13 to&amp;nbsp; active_top = 3 in the mxc_v4l2_capture.c driver.&amp;nbsp; This was mentioned as a work around in a few other discussion.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I still could use some help with configuring the foreground and background displays.&amp;nbsp;&amp;nbsp; Both layers will be used in our application.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 26 Apr 2014 01:23:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302483#M38363</guid>
      <dc:creator>matthewreynolds</dc:creator>
      <dc:date>2014-04-26T01:23:52Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6Q Interlaced TVIN bt656</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302484#M38364</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Instead of focusing on the drivers and the mxc_v4l2_tvin.out test utility, I was to solve the color problem by configuring the framebuffer for RGB565 and using the gstreamer plugin mfw_ipucsc in our application to perform the color space conversion.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Here is a test pipeline&lt;/P&gt;&lt;P&gt;gst-launch tvsrc ! 'video/x-raw-yuv,width=720,height=480,framerate=30/1' ! mfw_ipucsc ! 'video/x-raw-rgb,bpp=16,width=720,height=480,framerate=30/1' ! mfw_v4lsink disp-width=720 disp-height=480 device=/dev/video17&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Apr 2014 22:06:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302484#M38364</guid>
      <dc:creator>matthewreynolds</dc:creator>
      <dc:date>2014-04-28T22:06:20Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6Q Interlaced TVIN bt656</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302485#M38365</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mattew&lt;/P&gt;&lt;P&gt;Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Jun 2014 03:40:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302485#M38365</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-06-20T03:40:55Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6Q Interlaced TVIN bt656</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302486#M38366</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yixing,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes, I was able to work it out.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Matthew&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Jun 2014 05:48:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6Q-Interlaced-TVIN-bt656/m-p/302486#M38366</guid>
      <dc:creator>matthewreynolds</dc:creator>
      <dc:date>2014-06-20T05:48:01Z</dc:date>
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