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    <title>i.MX ProcessorsのトピックRe: Support BT1120 progressive mode in Mx6Q</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287282#M34093</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi Shaojun&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I followed the patch and try to get bt1120 progressive data .&amp;nbsp; but i can't&amp;nbsp; get the data from CSI0 .Are you sure other alternate&amp;nbsp; is not needed?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 28 Sep 2014 07:56:36 GMT</pubDate>
    <dc:creator>nealbush</dc:creator>
    <dc:date>2014-09-28T07:56:36Z</dc:date>
    <item>
      <title>Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287280#M34091</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The HDMI receiver verified with Mx6Q is SiI9135.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Hardware connection&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;According "Camera Input Signal Cross Reference, Format, and Bits Per Cycle" in Mx6Q Datasheet, the pin mapping is CSIx_DAT2 ~ CSIx_DAT9 &amp;lt;----&amp;gt; C[0] ~ C[7], CSIx_DAT12 ~ CSIx_DAT19 &amp;lt;----&amp;gt; Y[0] ~ Y[7].&lt;/P&gt;&lt;P&gt;In "YC 4:2:2 Formats with Embedded Syncs" of SiI9135 datasheet, the pin mapping is Q16 ~ Q23 &amp;lt;----&amp;gt; Y0 ~ Y7,&amp;nbsp; Q28 ~ Q35 &amp;lt;----&amp;gt; Cb0 ~ Cb7.&lt;/P&gt;&lt;P&gt;So Q28 ~ Q35 of SiI9135 should be connected to CSIx_DAT2 ~ CSIx_DAT9 of Mx6Q, Q16 ~ Q22 are connected to CSIx_DAT12 ~ CSIx_DAT19 of Mx6Q.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Kernel Patch&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;sii9135.patch is the kernel patch &lt;SPAN style="font-size: 11pt; font-family: 'Calibri','sans-serif';"&gt;to support BT1120 progressive mode&lt;/SPAN&gt;.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336583"&gt;sii9135.patch.txt.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Oct 2013 09:45:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287280#M34091</guid>
      <dc:creator>shaojun_wang</dc:creator>
      <dc:date>2013-10-18T09:45:48Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287281#M34092</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Question about 16bit BT.1120 interface pin connection.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I recognized that Table 68(Camera Input Signal Cross Reference, Format, and Bits Per Cycle) in the datasheet indicates not "-" but "0" to the 4 unused data pins(CSIx_DATA00/01/10/11) for 16bit BT.1120.&lt;/P&gt;&lt;P&gt;It is understood that those pins should be pulled down to logic 0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it really necessary to tie those pins to ground in the circuit ?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Jun 2014 13:12:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287281#M34092</guid>
      <dc:creator>kyu-myounglee</dc:creator>
      <dc:date>2014-06-16T13:12:17Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287282#M34093</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi Shaojun&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I followed the patch and try to get bt1120 progressive data .&amp;nbsp; but i can't&amp;nbsp; get the data from CSI0 .Are you sure other alternate&amp;nbsp; is not needed?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 28 Sep 2014 07:56:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287282#M34093</guid>
      <dc:creator>nealbush</dc:creator>
      <dc:date>2014-09-28T07:56:36Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287283#M34094</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This works well for us capturing 720P and 1080P. It does not appear that the state of the 4 unused pins make any difference&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Jan 2015 18:56:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287283#M34094</guid>
      <dc:creator>ottob</dc:creator>
      <dc:date>2015-01-13T18:56:45Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287284#M34095</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This patch seems to be for Kernel 3.0.35 BSP. Is this patch required for Kernel 3.10.17/53 BSP too?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am looking for a way to capture &lt;STRONG&gt;BT1120 192x1080 Interlaced &lt;/STRONG&gt;video using parallel CSI on Kernel 3.10, but I cannot find any resources/patches for this.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 20 Jun 2015 08:44:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287284#M34095</guid>
      <dc:creator>isaacnickaein</dc:creator>
      <dc:date>2015-06-20T08:44:52Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287285#M34096</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Isaac,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you fixe your problem?&lt;/P&gt;&lt;P&gt;I am also looking BT1120 interlace on iMX6Q, but I have dequeue timeout issue.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jun 2015 06:35:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287285#M34096</guid>
      <dc:creator>wuchirk</dc:creator>
      <dc:date>2015-06-30T06:35:12Z</dc:date>
    </item>
    <item>
      <title>Re: Support BT1120 progressive mode in Mx6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287286#M34097</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, did you understand this question?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Mar 2018 10:55:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Support-BT1120-progressive-mode-in-Mx6Q/m-p/287286#M34097</guid>
      <dc:creator>brunolain</dc:creator>
      <dc:date>2018-03-02T10:55:22Z</dc:date>
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