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    <title>i.MX ProcessorsのトピックRe: IPU question on I.mx6</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286185#M33731</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Qiang -&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where can I find the 'MMDC Profiling Tool' ?&lt;/P&gt;&lt;P&gt;(I started a question about it - &lt;A href="https://community.nxp.com/message/460964"&gt;MMDC Profiling Tool&lt;/A&gt;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Erez&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 Dec 2014 09:16:04 GMT</pubDate>
    <dc:creator>erezsteinberg</dc:creator>
    <dc:date>2014-12-09T09:16:04Z</dc:date>
    <item>
      <title>IPU question on I.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286183#M33729</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;UL&gt;&lt;LI&gt;&lt;P class="jive-thread-message clearfix"&gt;&lt;/P&gt;&lt;DIV class="js-thread-post-wrapper j-op j-rc4 j-thread-post-wrapper j-you jive-content"&gt;&lt;DIV class="j-thread-post j-rc4"&gt;Sorry to be a nuisance, but after some more digging I've got some more information on what we're seeing and I was sort hoping to do a sanity-check with you guys.&amp;nbsp; I wrote a little program to enable the profiler in the MMDC just to get a rough idea of what DDR utilization looks like in a few different scenarios.&amp;nbsp; I don't think I mentioned before, but we're running on the sabresd board right now with a little custom daughterboard to a mipi dsi display.&amp;nbsp; DDR clock is at 528MHz, and we're running around a 66MHz pixel clock.&amp;nbsp; I'm calculating utilization by just dividing MADPSR1/MADPSR0.&amp;nbsp; What I see is &lt;P&gt;&lt;/P&gt;&lt;P&gt;display blanked - &amp;lt; 1%&lt;/P&gt;&lt;P&gt;display unblanked/unrotated - 28%&lt;/P&gt;&lt;P&gt;display unblanked/rotated - 50%&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I was somewhat surprised by these numbers - the 28% for just the display seems a lot higher than I'd expect.&amp;nbsp; Given approximately a 66MHz pixel clock, the total bandwidth&amp;nbsp; from the memory should be around 264MByte/sec (66*4 - according to the reference manual the IPU translates everything in/out of memory to 8:8:8:8).&amp;nbsp; Peak rate for the ddr should be 528*2*64/8 = 8.4GByte/sec (and I realize peak bandwidth is a mostly useless metric here and that average throughput should be considerably lower, but it's a starting point).&amp;nbsp; Have you guys done any profiling at different resolutions/frame rates, and if so do the numbers we're seeing seem reasonable?&lt;/P&gt;&lt;P&gt;Like I said, sorry to be a nuisance, but we're trying to finalize our hardware design and we're trying to get a handle on whether there are pieces of the design we need to optimize by moving certain processing operations (like screen rotation) out in to our fpga.&lt;/P&gt;&lt;P&gt;Thanks again!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jul 2013 02:56:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286183#M33729</guid>
      <dc:creator>jasonhaedt</dc:creator>
      <dc:date>2013-07-23T02:56:21Z</dc:date>
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    <item>
      <title>Re: IPU question on I.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286184#M33730</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Freescale has the MMDC profiling tool, tested with this tool for signal 1024*768 LVDS 32bpp framebuffer output, pixel clock is 65MHz, the memory utilization is about 5%.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MMDC new Profiling results:&lt;BR /&gt;***********************&lt;BR /&gt;Total cycles count: 535147879&lt;BR /&gt;Busy cycles count: 109817083&lt;BR /&gt;Read accesses count: 1487501&lt;BR /&gt;Write accesses count: 788&lt;BR /&gt;Read bytes count: 95197168&lt;BR /&gt;Write bytes count: 23680&lt;BR /&gt;Avg. Read burst size: 63&lt;BR /&gt;Avg. Write burst size: 30&lt;BR /&gt;Read: 89.53 MB/s /&amp;nbsp; Write: 0.02 MB/s&amp;nbsp; Total: 89.56 MB/s &lt;/P&gt;&lt;P&gt;Utilization: 5%&lt;BR /&gt;Bus Load: 20%&lt;BR /&gt;Bytes Access: 63&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is not just using MADPSR1/MADPSR0&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Sep 2013 08:39:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286184#M33730</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2013-09-02T08:39:29Z</dc:date>
    </item>
    <item>
      <title>Re: IPU question on I.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286185#M33731</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Qiang -&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where can I find the 'MMDC Profiling Tool' ?&lt;/P&gt;&lt;P&gt;(I started a question about it - &lt;A href="https://community.nxp.com/message/460964"&gt;MMDC Profiling Tool&lt;/A&gt;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Erez&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Dec 2014 09:16:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU-question-on-I-mx6/m-p/286185#M33731</guid>
      <dc:creator>erezsteinberg</dc:creator>
      <dc:date>2014-12-09T09:16:04Z</dc:date>
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