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    <title>i.MX ProcessorsのトピックRe: VPU: offset right side image</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286053#M33669</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Yixing!&lt;/P&gt;&lt;P&gt;Unfortunally problem not soved because I can't found it reason.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 21 Feb 2014 17:22:15 GMT</pubDate>
    <dc:creator>BrilliantovKiri</dc:creator>
    <dc:date>2014-02-21T17:22:15Z</dc:date>
    <item>
      <title>VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286051#M33667</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;Hello!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;I have liitle problem - image with resolution 1024x720 is good, with resolution 80x600 I see offset right side image. &lt;BR /&gt;I check image after IPU - it good on any resolution, I use IPU for convert input YUV422 to YUV420 and resize image.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;For transfer buffer beetwen blocks (capture driver --&amp;gt; IPU --&amp;gt; VPU) I use physical addresses.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;Software versions:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;Linux-2.6.35.3&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;VPU firmware version: 1.4.41&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;VPU library version: 5.3.2&lt;/SPAN&gt;&lt;BR /&gt;How can I solve this problem? &lt;BR /&gt;Thank you and excuse my bad english.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;H264, 800x600&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="H264_800_600.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/41079iB4AB475AC0C8DAC3/image-size/large?v=v2&amp;amp;px=999" role="button" title="H264_800_600.png" alt="H264_800_600.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;H264, 1280x720&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; font-family: Arial,Helvetica,sans-serif;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="H264_1280_720.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/41105iCA003E71188E613B/image-size/large?v=v2&amp;amp;px=999" role="button" title="H264_1280_720.png" alt="H264_1280_720.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 05 Jan 2014 11:42:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286051#M33667</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-01-05T11:42:11Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286052#M33668</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Kirill&lt;/P&gt;&lt;P&gt;Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Feb 2014 06:36:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286052#M33668</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-02-21T06:36:27Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286053#M33669</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Yixing!&lt;/P&gt;&lt;P&gt;Unfortunally problem not soved because I can't found it reason.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Feb 2014 17:22:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286053#M33669</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-02-21T17:22:15Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286054#M33670</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Kirill&lt;/P&gt;&lt;P&gt;I will branch your issue into an onternal group and assign an engineer to look into it.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yixing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Feb 2014 05:16:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286054#M33670</guid>
      <dc:creator>YixingKong</dc:creator>
      <dc:date>2014-02-24T05:16:48Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286055#M33671</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kirill,&lt;/P&gt;&lt;P&gt;What processor are you using? &lt;/P&gt;&lt;P&gt;Are you using some Freescale board? If so, what?&lt;/P&gt;&lt;P&gt;How are you testing? Using the unit test?&lt;/P&gt;&lt;P&gt;Rgds&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2014 17:38:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286055#M33671</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-02-28T17:38:18Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286056#M33672</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Rogerio!&lt;/P&gt;&lt;P&gt;I use our board with iMX538 CPU, it configured on 160 MHz.&lt;/P&gt;&lt;P&gt;My tests very simpe - save buffer before,&amp;nbsp; after IPU, and after VPU, also I see result video in RTP-stream, buffer before VPU havn't this problem.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2014 18:35:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286056#M33672</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-02-28T18:35:28Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286057#M33673</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/BrilliantovKirillVladimirovich"&gt;BrilliantovKirillVladimirovich&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;1. Every image (static or when playing video) shows this issue? Or the problem only happens when you play a video?&lt;/P&gt;&lt;P&gt;2. Is it possible to reproduce the problem on a Freescale board?&lt;/P&gt;&lt;P&gt;3. Are you using a kernel provided by Freescale? If so, where does it come from? (e.g. Freescale BSP release x.x.x, from git.freescale.com branch xxxx)&lt;/P&gt;&lt;P&gt;Rgds&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 16:52:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286057#M33673</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-07T16:52:19Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286058#M33674</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Rogerio!&lt;/P&gt;&lt;P&gt;1. Yes, I see defect on video and static JPEG.&lt;/P&gt;&lt;P&gt;2. I think this will be very hard.&lt;/P&gt;&lt;P&gt;3. Yes, I use Linux 2.6.35.3 from BSP (L2.6.35_11.09.01_ER_source_bundle.tar.gz)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 17:18:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286058#M33674</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-03-07T17:18:59Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286059#M33675</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;What's the display resolution? Is it always 1280x720? I mean, in both cases, is the display resolution 1280x720?&lt;/P&gt;&lt;P&gt;You can check it using fbset&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 18:09:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286059#M33675</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-07T18:09:03Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286060#M33676</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Display resolution always FullHD (1920x1080).&lt;/P&gt;&lt;P&gt;How linked defect and display resolution?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 18:44:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286060#M33676</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-03-07T18:44:30Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286061#M33677</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Could you please send me the procedure (step by step) to reproduce the problem?&lt;/P&gt;&lt;P&gt;For me it's not clear what's causing the problem and I'd like to reproduce the issue.&lt;/P&gt;&lt;P&gt;Rgds&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Mar 2014 12:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286061#M33677</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-18T12:38:30Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286062#M33678</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Rogerio!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Capture YUV422, resolution 1280x720.&lt;/P&gt;&lt;P&gt;2. Convert and resize YUV422 to YUV420 in IPU, output resolution 800x600.&lt;/P&gt;&lt;P&gt;2.1. ipu_lib_input_param_t.user_def_paddr[0] = v4l2 buffer address&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_lib_output_param_t.user_def_paddr[0] = codec input buffer phys addres&lt;/P&gt;&lt;P&gt;2.2. output resolution aligned to 16&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; static inline unsigned short round_size(unsigned short val,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; bool to_big = false)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;return (to_big ? (val + 15) : val) / 16 * 16;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;3. Encode YUV420 buffer in VPU&lt;/P&gt;&lt;P&gt;EncOpenParam:&lt;/P&gt;&lt;P&gt;bitstreamBuffer 0x76a00000&lt;/P&gt;&lt;P&gt;bitstreamBufferSize 1638400&lt;/P&gt;&lt;P&gt;bitstreamFormat 2&lt;/P&gt;&lt;P&gt;picWidth 800&lt;/P&gt;&lt;P&gt;picHeight 592&lt;/P&gt;&lt;P&gt;frameRateInfo 65556000&lt;/P&gt;&lt;P&gt;bitRate 0&lt;/P&gt;&lt;P&gt;initialDelay 0&lt;/P&gt;&lt;P&gt;vbvBufferSize 0&lt;/P&gt;&lt;P&gt;gopSize 20&lt;/P&gt;&lt;P&gt;slicemode.sliceMode 0&lt;/P&gt;&lt;P&gt;slicemode.sliceSizeMode 0&lt;/P&gt;&lt;P&gt;slicemode.sliceSize 0&lt;/P&gt;&lt;P&gt;intraRefresh 0&lt;/P&gt;&lt;P&gt;sliceReport 0&lt;/P&gt;&lt;P&gt;mbReport 0&lt;/P&gt;&lt;P&gt;mbQpReport 0&lt;/P&gt;&lt;P&gt;rcIntraQp -1&lt;/P&gt;&lt;P&gt;dynamicAllocEnable 0&lt;/P&gt;&lt;P&gt;ringBufferEnable 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_constrainedIntraPredFlag 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_disableDeblk 1&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_deblkFilterOffsetAlpha 6&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_deblkFilterOffsetBeta 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_chromaQpOffset 10&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_audEnable 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_fmoEnable 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_fmoType 0&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_fmoSliceNum 1&lt;/P&gt;&lt;P&gt;EncStdParam.avcParam.avc_fmoSliceSaveBufSize 32&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;EncParam:&lt;/P&gt;&lt;P&gt;enableAutoSkip 0&lt;/P&gt;&lt;P&gt;encLeftOffset 0&lt;/P&gt;&lt;P&gt;encTopOffset 0&lt;/P&gt;&lt;P&gt;forceIPicture 0&lt;/P&gt;&lt;P&gt;quantParam 10&lt;/P&gt;&lt;P&gt;skipPicture 0&lt;/P&gt;&lt;P&gt;sourceFrame 0x54ba0ea8&lt;/P&gt;&lt;P&gt;picStreamBufferAddr 0&lt;/P&gt;&lt;P&gt;picStreamBufferSize 0&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Mar 2014 04:50:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286062#M33678</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-03-19T04:50:24Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286063#M33679</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Are you able to reproduce the problem using unit_tests? They're located at your rootfs /unit_tests.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Mar 2014 19:31:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286063#M33679</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-21T19:31:34Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286064#M33680</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I can't use it because unit_test not use IPU and work only with YUV420. This is will be not unit_test if I rewrite it for YUV422 and IPU.&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 22 Mar 2014 20:40:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286064#M33680</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-03-22T20:40:22Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286065#M33681</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In order to make tests, I suggest you to get the unit test that most approaches your application, modify it to meet your requirements and send me your results in case you still have problems. This way I can help to debug a possible problem on kernel or unit test code.&lt;/P&gt;&lt;P&gt;Rgds&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Mar 2014 16:35:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286065#M33681</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-24T16:35:49Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286066#M33682</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Rogeio!&lt;/P&gt;&lt;P&gt;Why this is change situtation if we are use same VPU labrary?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Mar 2014 10:37:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286066#M33682</guid>
      <dc:creator>BrilliantovKiri</dc:creator>
      <dc:date>2014-03-25T10:37:45Z</dc:date>
    </item>
    <item>
      <title>Re: VPU: offset right side image</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286067#M33683</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kirill,&lt;/P&gt;&lt;P&gt;I'm not being able to help you because I can't see the problem on my board/system.&lt;/P&gt;&lt;P&gt;If you find a way to reproduce the problem on a Freescale board, use an unit test SW as base (because it will be easier for me to debug) and a clear step by step process, I can reproduce the problem and debug it. This is why I asked you to get the unit test that most approaches your application.&lt;/P&gt;&lt;P&gt;Rgds&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Mar 2014 14:26:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-offset-right-side-image/m-p/286067#M33683</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2014-03-26T14:26:14Z</dc:date>
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