i.MX ProcessorsのトピックRe: why i.MX258 can't keep programmed-key

why i.MX258 can't keep programmed-key

jingdardu — Tue, 31 Dec 2013 01:51:50 GMT

Dear Sir,

We use i.MX258 as our production platform, after our device power-off, the programmed-key in dryice lost at all.

We have a coin-cell to save SCC when device power-off.

Please help out and answer below questions.

1, Dryice has the same function with Engineering or Production mode, correct?

2, Production / Engineering modes are related to SCC mostly, correct?

3, Currently, SCC is not our current focus, so Production/Engineering modes should not play any key role, correct?

4, Why DryIce failed to keep keys in its volatile memory AT ALL?

5, We are not sure it is the same issue which did report in ENGcm11122 (DryIce: Unexpected Reset) of Chip Errata for
the i.MX25). But based on the document, it should be fixed in silicon revision 1.2, and we did check our on hand chip and the revision is the latest one.

The DryIce module contains an internal power switch, which is used to switch between the backup battery input (BAT_VDD) and the system power (QVDD). When the system is powered off (shut down), the backup battery power is used by the DryIce module to maintain the RTC and the security features. The advantage of the battery backup power is, when the system is powered on
again, the SRTC features (time counter, monotonic counter, general purpose register, secure keys, and so on) are still valid. There is an error in the switching mechanism that may cause a reset in the DryIce module during the switch from the backup battery to system power. In turn, this invalidates the SRTC features when the system is powered on again. (same as ENGcm11122 which showed in Chip Errata for the i.MX25)

Re: why i.MX258 can't keep programmed-key

Yuri — Sat, 04 Jan 2014 06:17:42 GMT

In order to clarify the issue - is the power up sequence correct (as recommended in section 3.2.3 "SRTC DryIce Power-Up/Down Sequence"
of the Datasheet (IMX25CEC, Rev. 10, 07/2013)) ?

Re: why i.MX258 can't keep programmed-key

yslin — Tue, 07 Jan 2014 08:54:25 GMT

I saw the follwing power sequence from datasheet, is it correct ?

Any other HW concern ?

3.2.3 SRTC DryIce Power-Up/Down Sequence

In order to guarantee DryIce power-loss protection, including retention of SRTC time data during power

down, users must do the following:

• Place a proper capacitor on the NVCC_DRYICE output pin, and

• Implement the below power-up/down sequence

1. Assert power on reset (POR).

2. Turn on NVCC_CRM.

3. Turn on QVDD digital logic domain supplies for not less than 1 ms and not more than 32 ms, after

NVCC_CRM reaches 90% of 3.3 V.

NOTE

This is to guarantee that POR is stable already at NVCC_CRM/QVDD

power domain interface before QVDD is turned on, and POR instantly

propagates to QVDD domain after QVDD is turned on.

4. Turn on other NVCCx digital I/O power supplies for not less than 1 ms and not more than 32 ms,

after QVDD reaches 90% of 1.2 V.

5. Turn on all other analog power supplies, including USBPHY1_VDDA_BIAS,

USBPHY1_UPLL_VDD, USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC,

OSC24M_VDD, MPPLL_VDD, UPLL_VDD, and FUSEVDD (FUSEVDD is tied to GND if

fuses are not programmed) for not less than 1 ms and not more than 32 ms, after NVCCx reaches

90% of 3.3 V.

NOTE

This is to guarantee that analog peripherals can get properly initialized

(reset) values from QVDD domain and NVCCx domain.

6. Negate the POR signal for at least 90 μ s after all previous steps.

NOTE

• This is to guarantee that both POR logic and clocks are stable inside the

i.MX25 chip, before POR is removed.

• The dV/dT should be no faster than 0.25 V/us for all power supplies, to

avoid triggering ESD circuit.

In addition, the following power-down sequence is recommended:

1. Turn off power for analog parts, including USBPHY1_VDDA_BIAS, USBPHY1_UPLL_VDD,

USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND

if fuses are not programmed).

2. Turn off QVDD.

3. Turn off NVCCx, PLL, OSC, and other powers.

NOTE

The power-down steps can be executed simultaneously, or very shortly one

after another.

Re: why i.MX258 can't keep programmed-key

Yuri — Thu, 09 Jan 2014 09:18:37 GMT

> I saw the follwing power sequence from datasheet, is it correct ?

Yes.

> Any other HW concern ?

An external capacitor no less than 4 uF must be connected to NVCC_DRYICE.

Re: why i.MX258 can't keep programmed-key

yslin — Sat, 18 Jan 2014 12:18:11 GMT

Thank you.

Another question , Could you tell me NAND ECC bit can be supported by iMX258 ,1bit , 4bit or 8bit ?

And Have a NAND Flash support list ?

Thanks a lot.

YS_Lin