<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic How to use i.MX6SDL ENET_CRS_DV pad for CRS for RMII mode. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278901#M31740</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I consider using i.MX6DL RMII.&lt;/P&gt;&lt;P&gt;Please see Table 23-1 in IMX6SDLRM (Rev.1).&lt;/P&gt;&lt;P&gt;It shows ENET_CRS_DV pad can use for generating the CRS signal in RMII mode.&lt;/P&gt;&lt;P&gt;However, in chapter 37.4.117, there is no description about "CRS".&lt;/P&gt;&lt;P&gt;So I understand I can use ENET_CRS_DV pad to generate CRS in RMII mode with the following setting.&lt;/P&gt;&lt;P&gt;Is my understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Set MUX_MODE field in chapter 37.4.117 to 001b (ALT1 ENET_RX_EN).&lt;/P&gt;&lt;P&gt;2. Set DAISY bit in chapter 37.4.517 to 0 (ENET_CRS_DV_ALT1).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If some adittional setting is required, could you let me know it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 26 Dec 2013 07:36:11 GMT</pubDate>
    <dc:creator>satoshishimoda</dc:creator>
    <dc:date>2013-12-26T07:36:11Z</dc:date>
    <item>
      <title>How to use i.MX6SDL ENET_CRS_DV pad for CRS for RMII mode.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278901#M31740</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I consider using i.MX6DL RMII.&lt;/P&gt;&lt;P&gt;Please see Table 23-1 in IMX6SDLRM (Rev.1).&lt;/P&gt;&lt;P&gt;It shows ENET_CRS_DV pad can use for generating the CRS signal in RMII mode.&lt;/P&gt;&lt;P&gt;However, in chapter 37.4.117, there is no description about "CRS".&lt;/P&gt;&lt;P&gt;So I understand I can use ENET_CRS_DV pad to generate CRS in RMII mode with the following setting.&lt;/P&gt;&lt;P&gt;Is my understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Set MUX_MODE field in chapter 37.4.117 to 001b (ALT1 ENET_RX_EN).&lt;/P&gt;&lt;P&gt;2. Set DAISY bit in chapter 37.4.517 to 0 (ENET_CRS_DV_ALT1).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If some adittional setting is required, could you let me know it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 Dec 2013 07:36:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278901#M31740</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2013-12-26T07:36:11Z</dc:date>
    </item>
    <item>
      <title>Re: How to use i.MX6SDL ENET_CRS_DV pad for CRS for RMII mode.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278902#M31741</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, you are right.&lt;/P&gt;&lt;P&gt;The RMII port was verified on iMX6 OTT reference design: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-94561"&gt;https://community.freescale.com/docs/DOC-94561&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The macro for that pin:&lt;/P&gt;&lt;P&gt;MX6DL_PAD_ENET_CRS_DV__ENET_RX_EN&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define MX6DL_PAD_ENET_CRS_DV__ENET_RX_EN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;/P&gt;&lt;P&gt;&amp;nbsp; IOMUX_PAD(0x05B4, 0x01E4, 1, 0x0828, 0, MX6DL_ENET_PAD_CTRL)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Jan 2014 07:31:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278902#M31741</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-01-02T07:31:07Z</dc:date>
    </item>
    <item>
      <title>Re: How to use i.MX6SDL ENET_CRS_DV pad for CRS for RMII mode.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278903#M31742</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Qiang Li,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;OK, I got it!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Jan 2014 02:34:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-use-i-MX6SDL-ENET-CRS-DV-pad-for-CRS-for-RMII-mode/m-p/278903#M31742</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-01-06T02:34:25Z</dc:date>
    </item>
  </channel>
</rss>

