i.MX ProcessorsのトピックDDR3 FLY BY TOPOLOGY https://community.nxp.com/t5/i-MX-Processors/DDR3-FLY-BY-TOPOLOGY/m-p/277535#M31261 <HTML><HEAD></HEAD><BODY><P>IMX6 processor with fly by topology routing meets the timing wrt to the JEDEC specification but the voltage levels are less than 1V where it is suppose to be 1.5V please suggest solution for this rest of the data links seems to be fine.</P><P></P><P></P><P>i have attached a image of the topology and the waveforms.</P></BODY></HTML> Thu, 28 Feb 2013 05:31:50 GMT raghavendraanja 2013-02-28T05:31:50Z DDR3 FLY BY TOPOLOGY https://community.nxp.com/t5/i-MX-Processors/DDR3-FLY-BY-TOPOLOGY/m-p/277535#M31261 <HTML><HEAD></HEAD><BODY><P>IMX6 processor with fly by topology routing meets the timing wrt to the JEDEC specification but the voltage levels are less than 1V where it is suppose to be 1.5V please suggest solution for this rest of the data links seems to be fine.</P><P></P><P></P><P>i have attached a image of the topology and the waveforms.</P></BODY></HTML> Thu, 28 Feb 2013 05:31:50 GMT https://community.nxp.com/t5/i-MX-Processors/DDR3-FLY-BY-TOPOLOGY/m-p/277535#M31261 raghavendraanja 2013-02-28T05:31:50Z Re: DDR3 FLY BY TOPOLOGY https://community.nxp.com/t5/i-MX-Processors/DDR3-FLY-BY-TOPOLOGY/m-p/277536#M31262 <HTML><HEAD></HEAD><BODY><P>1. Per the topology.jpg, the Rt was pull down to the GND, while I think it should be pull up to DDR_VTT(0.75V) and connected to GND with a capacitor. Please refer i.mx6dq CPU board schematic.</P><P>2. I don't know the simulation and ISIB model. But for i.mx6dq DDR pad, the drive strength can be configured.What drive strength you are using? Try other value if you can.&nbsp; </P></BODY></HTML> Wed, 06 Mar 2013 02:44:32 GMT https://community.nxp.com/t5/i-MX-Processors/DDR3-FLY-BY-TOPOLOGY/m-p/277536#M31262 JerryFan 2013-03-06T02:44:32Z