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    <title>i.MX ProcessorsのトピックTransient voltage spec on NVCC_SD3?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Transient-voltage-spec-on-NVCC-SD3/m-p/272386#M29606</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;A transient voltage spec is not listed in the i.MX6D/Q spec for NVCC_SD3 line.&amp;nbsp; The operating voltage is 1.65 to 3.6V.&amp;nbsp; Will a transient of 4.5V at any pulse width damage the part?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;Scott&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 15 Jul 2013 14:06:10 GMT</pubDate>
    <dc:creator>ScottKerstein</dc:creator>
    <dc:date>2013-07-15T14:06:10Z</dc:date>
    <item>
      <title>Transient voltage spec on NVCC_SD3?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Transient-voltage-spec-on-NVCC-SD3/m-p/272386#M29606</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;A transient voltage spec is not listed in the i.MX6D/Q spec for NVCC_SD3 line.&amp;nbsp; The operating voltage is 1.65 to 3.6V.&amp;nbsp; Will a transient of 4.5V at any pulse width damage the part?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;Scott&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 Jul 2013 14:06:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Transient-voltage-spec-on-NVCC-SD3/m-p/272386#M29606</guid>
      <dc:creator>ScottKerstein</dc:creator>
      <dc:date>2013-07-15T14:06:10Z</dc:date>
    </item>
    <item>
      <title>Re: Transient voltage spec on NVCC_SD3?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Transient-voltage-spec-on-NVCC-SD3/m-p/272387#M29607</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The fact, that "&lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;transient voltage spec is not listed in the i.MX6D/Q spec&lt;/SPAN&gt;" means that&amp;nbsp; any voltages outside of &lt;BR /&gt;specified range are disabled, assuming that only ramp from 0.0 V during power up is allowed.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Moreover, please pay attention on the following footnote in i.MX6 Datasheet regarding IO pins:&lt;BR /&gt;"Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V, &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be &lt;/SPAN&gt;controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jul 2013 03:34:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Transient-voltage-spec-on-NVCC-SD3/m-p/272387#M29607</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2013-07-16T03:34:46Z</dc:date>
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