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    <title>i.MX Processors中的主题 Re: imx53 UART5 RX problem</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268129#M28310</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've found and fixed the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There are several mistakes in arch/arm/plat-mxc/include/mach/iomux-mx53.h&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is a mistake on almost every TXD_MUX define for all five UARTS such as this: &lt;/P&gt;&lt;P&gt;#define _MX53_PAD_PATA_DIOW_UART1_TXD_MUX IOMUX_PAD(0x5F0, 0x270, 3, 0x878, 2, 0) &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In this line, it lists the offset 0x878 for the SELECT_INPUT with a value of 2.&amp;nbsp; The 0x878 offset corresponds to the IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT register and assigns it a value of 2 which selects PATA_DIOW for mode ALT3.&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; So when it configures the iomuxing for the TXD line it incorrectly sets the RXD_MUX_SELECT_INPUT to the wrong pin, ensuring that any data on the proper pin will not be received.&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The reason that my code works for some UARTs but not others was that in my list of pads to setup, I put the RXD pad before TXD for UARTS 3,4 and 5.&amp;nbsp;&amp;nbsp; For UARTS 1 and 2, they worked because when setting up the RXD pin, it would overwrite the incorrect value from when it setup the TXD pin.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To fix it properly, I have modified my version of&amp;nbsp;&amp;nbsp; arch/arm/plat-mxc/include/mach/iomux-mx53.h&lt;/P&gt;&lt;P&gt;So, for the example above, the #define should have been:&lt;/P&gt;&lt;P&gt; #define _MX53_PAD_PATA_DIOW_UART1_TXD_MUX IOMUX_PAD(0x5F0, 0x270, 3, 0x0, 0, 0)&amp;nbsp; &lt;/P&gt;&lt;P&gt; With no SELECT_INPUT_OFS so that it does not write into the RXD select input.&amp;nbsp; I'm not sure why the RXD has this extra level of muxing when the TXD does not.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This change needs to be duplicated for every TXD_MUX&amp;nbsp; #define in the iomux-mx53.h&amp;nbsp; (for each ALT option, there are 2 or 3 options per UART).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 22 Feb 2013 22:18:44 GMT</pubDate>
    <dc:creator>MarkRoy</dc:creator>
    <dc:date>2013-02-22T22:18:44Z</dc:date>
    <item>
      <title>imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268124#M28305</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello folks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm using the 11.09 Linux BSP&amp;nbsp;&amp;nbsp; (2.6.35.3 kernel) on a custom i.mx53 board.&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have UART5_RXD_MUX and UART5_TXD_MUX connected on&amp;nbsp; CSIO_DAT15 (alt 2) and CSIO_DAT14 (alt 2) respectively.&amp;nbsp; I have added in the list of pads for the board&amp;nbsp; MX53_PAD_CSI0_DAT15__UART5_RXD_MUX&amp;nbsp; and MX53_PAD_CSI0_DAT14__UART5_TXD_MUX for iomuxing. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have looped back the RX and TX pins&amp;nbsp; with a jumper wire on the board so that anything sent on TX should be received on RX.&amp;nbsp; If I connect my scope to the RXD pin and transmit some data, I can see it transmitting just fine.&amp;nbsp;&amp;nbsp; However, the imx53 does not seem to receive anything.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have modified arch/arm/mach-mx5/serial.c and arch/arm/mach-mx5/serial.h so that all of the UARTS have the same settings.&amp;nbsp;&amp;nbsp; The other UARTS seem to be working fine and I have configured them the same way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have also verified that I have the right pin, U2 of the imx53 that I am using on my board.&amp;nbsp;&amp;nbsp; I also dont believe that the pin is damaged because I have two boards and they both show the identical problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let me know if anybody has any ideas or suggestions as to why the RXD might not be working on UART5.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Mark Roy &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2013 17:33:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268124#M28305</guid>
      <dc:creator>MarkRoy</dc:creator>
      <dc:date>2013-02-21T17:33:03Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268125#M28306</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Take a look at these 2 other entries:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/259509"&gt;Enabling Uarts 4 &amp;amp;amp; 5 on i.MX53 QSB&lt;/A&gt;&lt;/P&gt;&lt;P&gt;This one shows the need to set up the clock for UART5.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/290411"&gt;UART4 not responding but UART2 does&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Take a look at the comment on the macros.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Rod.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2013 18:51:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268125#M28306</guid>
      <dc:creator>RodBorras</dc:creator>
      <dc:date>2013-02-21T18:51:19Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268126#M28307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have already changed the macros in iomux-mx53.h&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'll look into the clocks again for UART5, but I think if it were the case of incorrect clocking, then the UART5 TX should not work.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[edit] I just checked the clocks and they are correctly registered.&amp;nbsp; When I boot, all 5 uarts are found and populated.&amp;nbsp;&amp;nbsp; All UARTS transmit function works fine. &lt;/P&gt;&lt;P&gt;I'm going to try jumpering the TX / RX on UART4 to see if it is working correctly, or if it is just uart5 that is not working correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[edit2] Just confirmed that UART4 RX is also not working.&amp;nbsp; Maybe there is another issue with the clocking other than registration?&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2013 20:21:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268126#M28307</guid>
      <dc:creator>MarkRoy</dc:creator>
      <dc:date>2013-02-21T20:21:40Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268127#M28308</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've been checking clocking and also digging through the serial driver and for the life of me I cant figure out what's wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've checked the IOMUX configuration countless times and verified each of these configuration registers from the reference manual.&amp;nbsp; They should all be correct as I have defined in my board file.&amp;nbsp;&amp;nbsp; I have also verified the daisychain configuration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've checked clocking and the clocks all seem to be registered and running since I can transmit fine on all UARTS.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I added a debug line to the mxcuart_int&amp;nbsp; ISR in the mxc_uart.c driver and it cr1, sr1, and sr2 seem to be correct.&amp;nbsp;&amp;nbsp; In cr1&amp;nbsp; RRDYEN is set, so it should be generating interrupts on receive, but it seems no such interrupt is generated.&amp;nbsp;&amp;nbsp; I have my oscilloscope connected directly to pin U2 (CSI0_DAT15) and the on-chip pull up is enabled on boot and the bus floats to 1.8V,&amp;nbsp; transmitting my data to it through a level translator I can see very clear characters being sent on my oscilloscope.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'll keep digging around, hopefully the solution isnt for me to just abandon UARTs 4/5.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2013 23:22:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268127#M28308</guid>
      <dc:creator>MarkRoy</dc:creator>
      <dc:date>2013-02-21T23:22:31Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268128#M28309</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In situations like these, it is sometimes easier to figure this out in bare-metal code, just in case Linux is doing something you are not aware of.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have you tried the OBDS (On Board Diagnostic Suite) before? It is very simple bare-metal code with tests for most peripherals.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find it here: &lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX534&amp;amp;nodeId=018rH3ZrDR988D&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab" title="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX534&amp;amp;nodeId=018rH3ZrDR988D&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab"&gt;i.MX534 Product Summary Page&lt;/A&gt;&lt;/P&gt;&lt;P&gt;under the&amp;nbsp; Lab &amp;amp; Test Software tab.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Rod.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 Feb 2013 23:38:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268128#M28309</guid>
      <dc:creator>RodBorras</dc:creator>
      <dc:date>2013-02-21T23:38:59Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268129#M28310</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've found and fixed the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There are several mistakes in arch/arm/plat-mxc/include/mach/iomux-mx53.h&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is a mistake on almost every TXD_MUX define for all five UARTS such as this: &lt;/P&gt;&lt;P&gt;#define _MX53_PAD_PATA_DIOW_UART1_TXD_MUX IOMUX_PAD(0x5F0, 0x270, 3, 0x878, 2, 0) &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In this line, it lists the offset 0x878 for the SELECT_INPUT with a value of 2.&amp;nbsp; The 0x878 offset corresponds to the IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT register and assigns it a value of 2 which selects PATA_DIOW for mode ALT3.&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; So when it configures the iomuxing for the TXD line it incorrectly sets the RXD_MUX_SELECT_INPUT to the wrong pin, ensuring that any data on the proper pin will not be received.&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The reason that my code works for some UARTs but not others was that in my list of pads to setup, I put the RXD pad before TXD for UARTS 3,4 and 5.&amp;nbsp;&amp;nbsp; For UARTS 1 and 2, they worked because when setting up the RXD pin, it would overwrite the incorrect value from when it setup the TXD pin.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To fix it properly, I have modified my version of&amp;nbsp;&amp;nbsp; arch/arm/plat-mxc/include/mach/iomux-mx53.h&lt;/P&gt;&lt;P&gt;So, for the example above, the #define should have been:&lt;/P&gt;&lt;P&gt; #define _MX53_PAD_PATA_DIOW_UART1_TXD_MUX IOMUX_PAD(0x5F0, 0x270, 3, 0x0, 0, 0)&amp;nbsp; &lt;/P&gt;&lt;P&gt; With no SELECT_INPUT_OFS so that it does not write into the RXD select input.&amp;nbsp; I'm not sure why the RXD has this extra level of muxing when the TXD does not.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This change needs to be duplicated for every TXD_MUX&amp;nbsp; #define in the iomux-mx53.h&amp;nbsp; (for each ALT option, there are 2 or 3 options per UART).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Feb 2013 22:18:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268129#M28310</guid>
      <dc:creator>MarkRoy</dc:creator>
      <dc:date>2013-02-22T22:18:44Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268130#M28311</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;That is very impressive. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I apologize for the mistakes in our code. I will inform the BSP team so it can be fixed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Rod.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Feb 2013 22:29:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268130#M28311</guid>
      <dc:creator>RodBorras</dc:creator>
      <dc:date>2013-02-22T22:29:08Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268131#M28312</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for reporting it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have just taken a look at the mainline code and I see:&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=drivers/pinctrl/pinctrl-imx53.c;h=2c9c8e2334da2524f9d9127375cbc7456cda6aae;hb=HEAD" title="http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=drivers/pinctrl/pinctrl-imx53.c;h=2c9c8e2334da2524f9d9127375cbc7456cda6aae;hb=HEAD"&gt;git.kernel.org - linux/kernel/git/torvalds/linux.git/blob - drivers/pinctrl/pinctrl-imx53.c&lt;/A&gt;&lt;/P&gt;&lt;P&gt;IMX_PIN_REG(MX53_PAD_PATA_DIOW, 0x5F0, 0x270, 3, 0x000, 0), /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */&lt;/P&gt;&lt;P&gt;,which matches your proposed definition.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So it looks like these are defined correctly in the version from kernel.org.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fabio Estevam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 23 Feb 2013 18:49:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268131#M28312</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2013-02-23T18:49:08Z</dc:date>
    </item>
    <item>
      <title>Re: imx53 UART5 RX problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268132#M28313</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for pointing the issue and the fix. It is available at the below git repository:&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/log/?h=imx_2.6.35_maintain" title="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/log/?h=imx_2.6.35_maintain"&gt;http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/log/?h=imx_2.6.35_maintain&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Mar 2013 15:05:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx53-UART5-RX-problem/m-p/268132#M28313</guid>
      <dc:creator>maheshmahadeva1</dc:creator>
      <dc:date>2013-03-01T15:05:22Z</dc:date>
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