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    <title>i.MX ProcessorsのトピックUnable to access IPU Registers</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267038#M28014</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to get a custom kernel working and for the framebuffer, access to the IPU registers is fundamental. IPU_1_BASE is at 0x02600000. But any sort of read/write access to any of the registers from here throws an error. For example, I tried stopping the DI0 pixel clock (IPUx_DI0_GENERAL) by setting it to 0. But it throws an error. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What I have done so far:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1. I read from &lt;A _jive_internal="true" href="https://community.nxp.com/thread/313908" target="_blank"&gt;here&lt;/A&gt; about enabling the clocks through CCM. Which I have done so far. I wrote 0x3&amp;nbsp; to both ipu_1_clk_enable and ipu1_ipu_di0_clk_enable in CCM::CCGR3.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2. I've also configured IOMUXC to IPU_enable through IOMUXC::GPR2 's CH0_MODE, BIT_MAPPING_CH0, DATA_WIDTH_CH0 and DI0_VS_POLARITY.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A R/W access to IPU module still doesn't work. Clearly, what I've done so far is either wrong/incomplete. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is the procedure to get the IPU (and by extension, the framebuffer) enabled and working? I couldn't find the particular answer in the reference manual. Any idea/assistance would be deeply appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and regards&lt;/P&gt;&lt;P&gt;Aditya Kousik&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 28 Feb 2014 11:26:24 GMT</pubDate>
    <dc:creator>aditkous</dc:creator>
    <dc:date>2014-02-28T11:26:24Z</dc:date>
    <item>
      <title>Unable to access IPU Registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267038#M28014</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to get a custom kernel working and for the framebuffer, access to the IPU registers is fundamental. IPU_1_BASE is at 0x02600000. But any sort of read/write access to any of the registers from here throws an error. For example, I tried stopping the DI0 pixel clock (IPUx_DI0_GENERAL) by setting it to 0. But it throws an error. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What I have done so far:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1. I read from &lt;A _jive_internal="true" href="https://community.nxp.com/thread/313908" target="_blank"&gt;here&lt;/A&gt; about enabling the clocks through CCM. Which I have done so far. I wrote 0x3&amp;nbsp; to both ipu_1_clk_enable and ipu1_ipu_di0_clk_enable in CCM::CCGR3.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2. I've also configured IOMUXC to IPU_enable through IOMUXC::GPR2 's CH0_MODE, BIT_MAPPING_CH0, DATA_WIDTH_CH0 and DI0_VS_POLARITY.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A R/W access to IPU module still doesn't work. Clearly, what I've done so far is either wrong/incomplete. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is the procedure to get the IPU (and by extension, the framebuffer) enabled and working? I couldn't find the particular answer in the reference manual. Any idea/assistance would be deeply appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and regards&lt;/P&gt;&lt;P&gt;Aditya Kousik&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2014 11:26:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267038#M28014</guid>
      <dc:creator>aditkous</dc:creator>
      <dc:date>2014-02-28T11:26:24Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to access IPU Registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267039#M28015</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Here is an update on this issue. I have tinkered with the CCM register values to enable ipu_clk_enable and ipu_di0_clk_enable by writing 0x3 to CCGR3. Resetting CSCMR2 and setting ldb_di0_ipu_div. Reset CDCDR. This set of instructions gave me access to a part of the IPU registers i.e. IPUx_CONF to IPUx_CH_BUF2_RDY1. But a simple read from IPU_IDMAC_CONF crashes the system. This led me to look into the IPUx_CONF register where I found 'enable' bits to the sub-modules. I had set the CONF register to 0x660 for configuring enabling DP,DMFC, DI,DC to enable. And since IDMAC is a disable register, a R/W to IDMAC should work. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Quite stuck so far. Freescale team, please provide some insight,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Aditya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Mar 2014 07:46:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267039#M28015</guid>
      <dc:creator>aditkous</dc:creator>
      <dc:date>2014-03-06T07:46:07Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to access IPU Registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267040#M28016</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;H6 style="font-style: inherit; font-family: inherit;"&gt;&lt;STRONG style="font-style: inherit; font-family: inherit;"&gt;&lt;A _jive_internal="true" class="font-color-meta-light" href="https://community.nxp.com/message/392368#392368" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;"&gt;Re: Unable to access IPU Registers&lt;/A&gt;&lt;/STRONG&gt;&lt;/H6&gt;&lt;P class="j-post-avatar" style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;A _jive_internal="true" class="j-avatar jiveTT-hover-user" data-avatarid="26857" data-externalid="" data-presence="null" data-userid="2014" data-username="rogeriopimentel" href="https://community.nxp.com/people/rogeriopimentel" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #6a737b;"&gt;&lt;IMG alt="rogeriopimentel" border="0" class="jiveImage jive-avatar" data-avatarid="26857" data-height="46" data-username="rogeriopimentel" height="46" src="https://community.nxp.com/people/rogeriopimentel/avatar/46.png?a=26857" style="border: 0px; font-weight: inherit; font-style: inherit; font-family: inherit;" width="46" /&gt;&lt;/A&gt;&lt;SPAN class="j-status-levels" style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;IMG alt="Employee" class="jiveImage" src="https://community.nxp.com/6.0.2.0/resources/images/status/FS_EMP_40x18.png" style="font-weight: inherit; font-style: inherit; font-family: inherit;" title="Employee" /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="j-post-author" style="font-weight: inherit; font-style: inherit; font-size: 0.9em; font-family: inherit;"&gt;&lt;STRONG style="font-style: inherit; font-family: inherit;"&gt;&lt;A href="https://community.nxp.com/people/rogeriopimentel"&gt;rogeriopimentel&lt;/A&gt; &lt;/STRONG&gt;Apr 1, 2014 9:45 AM &lt;SPAN class="font-color-meta-light j-thread-replyto" style="padding: 0 0 0 3px; font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;"&gt;(&lt;A _jive_internal="true" class="font-color-meta-light localScroll" href="https://community.nxp.com/message/392368?et=watches.email.thread#390525" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;" title="Go to message"&gt;in response to gusarambula&lt;/A&gt;)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class="j-ui-elem j-dotted-star" style="font-weight: inherit; font-style: inherit; font-family: inherit; background-position: no-repeat no-repeat;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;If you want to read an IPU register inside kernel code, you can use the followign lines:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&amp;nbsp; reg = __raw_readl(IC_PP_RSC);&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&amp;nbsp; printk(KERN_INFO "*** Register IPU %x ***\n", reg);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;You can try to do it on Freescale kernel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Rgds&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Apr 2014 17:07:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Unable-to-access-IPU-Registers/m-p/267040#M28016</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-04-01T17:07:07Z</dc:date>
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