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    <title>i.MX ProcessorsのトピックWhat is the address of CPMEM ?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266389#M27781</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hallo,&lt;BR /&gt;I try to make a test programm (without Linux...) for IPU/CSI to get a picture from a camera (IPU2/CSI1 parallel interface) to memory via IDMA. At this, the question rise what the address for the CPMEM to configure the IDMA is? In reference manuale I found, that CPMEM is "Memory mapped" but I found no value for the address where CPMEM is situated and I also did not found a register to put in the address for CPMEM.&lt;/P&gt;&lt;P&gt;In "iMX6_Platform_SDK\sdk\include\mx6dq\ipu_reg_def.h" I found :&lt;/P&gt;&lt;P&gt;#define IPU_REGISTERS_OFFSET&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00200000&lt;/P&gt;&lt;P&gt;#define IPU_MEMORY_OFFSET&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU_REGISTERS_OFFSET + 0x00100000&lt;/P&gt;&lt;P&gt;#define CPMEM_WORD0_DATA0_INT__ADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU_MEMORY_OFFSET+0x0000000 &lt;/P&gt;&lt;P&gt;From this, the address for the start of CPMEM in case of IPU2&amp;nbsp; is 0x02D00000.&lt;/P&gt;&lt;P&gt;When I try to read from this address or to write to this address I got an bus error exception (0x10). This happens both in UBOOT (md.l 0x02D0000 1)&lt;/P&gt;&lt;P&gt;and in my application which I load with JTAG (Lauterbach/TRACE32). So I have to assume that there is no memory or registers at this address?&lt;/P&gt;&lt;P&gt;Where are the values used in SDK for IPU_REGISTERS_OFFSET and IPU_MEMORY_OFFSET documented in datasheet or reference manual ?&lt;/P&gt;&lt;P&gt;How do I tell the IDMAC where the CPMEM with his configuration is ?&lt;/P&gt;&lt;P&gt;Thanks in advance for answers.&lt;/P&gt;&lt;P&gt;Klaus&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 31 May 2013 07:13:18 GMT</pubDate>
    <dc:creator>KlausGuertler</dc:creator>
    <dc:date>2013-05-31T07:13:18Z</dc:date>
    <item>
      <title>What is the address of CPMEM ?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266389#M27781</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hallo,&lt;BR /&gt;I try to make a test programm (without Linux...) for IPU/CSI to get a picture from a camera (IPU2/CSI1 parallel interface) to memory via IDMA. At this, the question rise what the address for the CPMEM to configure the IDMA is? In reference manuale I found, that CPMEM is "Memory mapped" but I found no value for the address where CPMEM is situated and I also did not found a register to put in the address for CPMEM.&lt;/P&gt;&lt;P&gt;In "iMX6_Platform_SDK\sdk\include\mx6dq\ipu_reg_def.h" I found :&lt;/P&gt;&lt;P&gt;#define IPU_REGISTERS_OFFSET&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00200000&lt;/P&gt;&lt;P&gt;#define IPU_MEMORY_OFFSET&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU_REGISTERS_OFFSET + 0x00100000&lt;/P&gt;&lt;P&gt;#define CPMEM_WORD0_DATA0_INT__ADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU_MEMORY_OFFSET+0x0000000 &lt;/P&gt;&lt;P&gt;From this, the address for the start of CPMEM in case of IPU2&amp;nbsp; is 0x02D00000.&lt;/P&gt;&lt;P&gt;When I try to read from this address or to write to this address I got an bus error exception (0x10). This happens both in UBOOT (md.l 0x02D0000 1)&lt;/P&gt;&lt;P&gt;and in my application which I load with JTAG (Lauterbach/TRACE32). So I have to assume that there is no memory or registers at this address?&lt;/P&gt;&lt;P&gt;Where are the values used in SDK for IPU_REGISTERS_OFFSET and IPU_MEMORY_OFFSET documented in datasheet or reference manual ?&lt;/P&gt;&lt;P&gt;How do I tell the IDMAC where the CPMEM with his configuration is ?&lt;/P&gt;&lt;P&gt;Thanks in advance for answers.&lt;/P&gt;&lt;P&gt;Klaus&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 May 2013 07:13:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266389#M27781</guid>
      <dc:creator>KlausGuertler</dc:creator>
      <dc:date>2013-05-31T07:13:18Z</dc:date>
    </item>
    <item>
      <title>Re: What is the address of CPMEM ?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266390#M27782</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;From &lt;SPAN lang="EN-US" style="font-family: 'Verdana','sans-serif';"&gt;Table 2-1 (System memory map&lt;/SPAN&gt;) of the i.MX6 (Q) Reference Manual IPU-1 base address is 0x0260_0000.&lt;BR /&gt;So, CPMEM address is 0x0270_0000.&lt;BR /&gt;&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 May 2013 09:04:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266390#M27782</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2013-05-31T09:04:28Z</dc:date>
    </item>
    <item>
      <title>Re: What is the address of CPMEM ?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266391#M27783</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri Muhin,&lt;/P&gt;&lt;P&gt;the base address of the IPU is defined in Table 2-1, but not the offset for CPMEM. And when I take the values from&lt;/P&gt;&lt;P&gt;the SDK, I get 0x02600000 + 0x00200000 + 0x00100000 = 0x02900000. And still there is the question where these&lt;/P&gt;&lt;P&gt;offsets from SDK (0x00200000 and 0x00100000) comming from. Where are these values documented.&lt;BR /&gt;Klaus&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 May 2013 10:16:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266391#M27783</guid>
      <dc:creator>KlausGuertler</dc:creator>
      <dc:date>2013-05-31T10:16:42Z</dc:date>
    </item>
    <item>
      <title>Re: What is the address of CPMEM ?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266392#M27784</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I verified the CPMEM address for IPU2 as 0x02B0_0000. It works fine. But still there is the question where I can find this in the documents and still there are the strange defines also in the latest SDK's file ipu_reg_def.h. See my initial posting.&lt;/P&gt;&lt;P&gt;Klaus&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2013 05:55:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-is-the-address-of-CPMEM/m-p/266392#M27784</guid>
      <dc:creator>KlausGuertler</dc:creator>
      <dc:date>2013-06-07T05:55:16Z</dc:date>
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