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    <title>topic Specific question regarding imx6 IPU DI in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262328#M26576</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear community members,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I need an opinion from the users experienced in imx6 IPUv3 kernel driver to solve a specific problem in our application.&lt;/P&gt;&lt;P&gt;Our development board is Sabre Lite from Boundary Devices.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In short, our targeted device can be seen as a tablet with HDMI input.&lt;/P&gt;&lt;P&gt;We want to combine 2 video streams (please, review the attached image):&lt;/P&gt;&lt;P&gt;- HDMI video stream (downscaled to 1280x800, set to 60fps and converted to RGB888);&lt;/P&gt;&lt;P&gt;- GUI video stream generated by iMX6 (same format as above);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The intention is to put the GUI above the HDMI picture (overlay done externally by FPGA) and to display the result on LCD.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently the problem is to have the pixel information coming to FPGA in synchronous manner (pixel N from source1 and pixel N from source2 &lt;STRONG&gt;at the same time&lt;/STRONG&gt;), in order to avoid the need for memory at FPGA level.&lt;/P&gt;&lt;P&gt;Basically, in my understanding, this would be possible if driving the imx6 IPU by external clock and syncs (H/V).&lt;/P&gt;&lt;P&gt;According to imx6 reference manual it should be possible. However, the community threads discussing the ASYNC IPU DI functionality are mainly focused on system-80 or system-68K protocols, which are not required in our application.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could someone provide a starting point for me to go on and implement the feature in the IPU driver.&lt;/P&gt;&lt;P&gt;What would be the workload for this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Eugeniu.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 18 Feb 2013 16:11:10 GMT</pubDate>
    <dc:creator>eugeniur</dc:creator>
    <dc:date>2013-02-18T16:11:10Z</dc:date>
    <item>
      <title>Specific question regarding imx6 IPU DI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262328#M26576</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear community members,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I need an opinion from the users experienced in imx6 IPUv3 kernel driver to solve a specific problem in our application.&lt;/P&gt;&lt;P&gt;Our development board is Sabre Lite from Boundary Devices.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In short, our targeted device can be seen as a tablet with HDMI input.&lt;/P&gt;&lt;P&gt;We want to combine 2 video streams (please, review the attached image):&lt;/P&gt;&lt;P&gt;- HDMI video stream (downscaled to 1280x800, set to 60fps and converted to RGB888);&lt;/P&gt;&lt;P&gt;- GUI video stream generated by iMX6 (same format as above);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The intention is to put the GUI above the HDMI picture (overlay done externally by FPGA) and to display the result on LCD.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently the problem is to have the pixel information coming to FPGA in synchronous manner (pixel N from source1 and pixel N from source2 &lt;STRONG&gt;at the same time&lt;/STRONG&gt;), in order to avoid the need for memory at FPGA level.&lt;/P&gt;&lt;P&gt;Basically, in my understanding, this would be possible if driving the imx6 IPU by external clock and syncs (H/V).&lt;/P&gt;&lt;P&gt;According to imx6 reference manual it should be possible. However, the community threads discussing the ASYNC IPU DI functionality are mainly focused on system-80 or system-68K protocols, which are not required in our application.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could someone provide a starting point for me to go on and implement the feature in the IPU driver.&lt;/P&gt;&lt;P&gt;What would be the workload for this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Eugeniu.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Feb 2013 16:11:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262328#M26576</guid>
      <dc:creator>eugeniur</dc:creator>
      <dc:date>2013-02-18T16:11:10Z</dc:date>
    </item>
    <item>
      <title>Re: Specific question regarding imx6 IPU DI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262329#M26577</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;H6 style="font-weight: normal; font-style: inherit; font-family: inherit;"&gt;&lt;STRONG style="font-style: inherit; font-family: inherit;"&gt;&lt;A _jive_internal="true" class="font-color-meta-light" href="https://community.nxp.com/message/322040#322040" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;"&gt;Re: Specific question regarding imx6 IPU DI&lt;/A&gt;&lt;/STRONG&gt;&lt;/H6&gt;&lt;P class="j-post-avatar" style="font-style: inherit; font-family: inherit;"&gt;&lt;A _jive_internal="true" class="j-avatar jiveTT-hover-user" data-avatarid="1034" data-externalid="" data-presence="null" data-userid="203530" data-username="chihchiehtu" href="https://community.nxp.com/people/chihchiehtu" style="font-style: inherit; font-family: inherit; color: #3778c7;"&gt;&lt;IMG alt="Chih Chieh Tu" border="0" class="jiveImage jive-avatar" data-height="46" height="46" src="https://community.nxp.com/people/chihchiehtu/avatar/46.png?a=1034" style="border: 0px; font-style: inherit; font-family: inherit;" width="46" /&gt;&lt;/A&gt;&lt;SPAN class="j-status-levels" style="font-style: inherit; font-family: inherit;"&gt;&lt;IMG alt="Employee" class="jiveImage" src="https://community-cache.freescale.com/5.0.3/resources/images/status/FS_EMP_40x18.png" style="font-style: inherit; font-family: inherit;" title="Employee" /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="j-post-author" style="font-style: inherit; font-size: 0.9em; font-family: inherit;"&gt;&lt;STRONG style="font-style: inherit; font-family: inherit;"&gt;&lt;A href="https://community.nxp.com/people/chihchiehtu"&gt;chihchiehtu&lt;/A&gt; &lt;/STRONG&gt;Mar 29, 2013 12:48 AM &lt;SPAN class="font-color-meta-light j-thread-replyto" style="padding: 0 0 0 3px; font-style: inherit; font-family: inherit; color: #a9a9a9;"&gt;(&lt;A _jive_internal="true" class="font-color-meta-light localScroll" href="https://community.nxp.com/message/322138#316481" style="font-style: inherit; font-family: inherit; color: #a9a9a9;" title="Go to message"&gt;in response to imxcommunityscout&lt;/A&gt;)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class="j-ui-elem j-dotted-star" style="font-style: inherit; font-family: inherit; background-position: no-repeat no-repeat;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;I guess you are saying, you will have two IPU DI output to your FPGA, and how to sync these two DIs.&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;My suggestion is,&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;1. Two DIs are using the same pixel clock tree&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;2. Setting IPU in advance&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;3. One time write to enable two IDMAC, to start two IPU idmac channel.&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;i.e., ipu_idmac_write(ipu,&amp;nbsp; reg | 0x1 &amp;lt;&amp;lt; 23 | 0x1 &amp;lt;&amp;lt; 28, IDMAC_EN);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;&lt;SPAN class="mce_paste_marker" style="font-style: inherit; font-family: inherit;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-style: inherit; font-family: inherit;"&gt;Hope it helps.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Apr 2013 18:36:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262329#M26577</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2013-04-08T18:36:58Z</dc:date>
    </item>
    <item>
      <title>Re: Specific question regarding imx6 IPU DI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262330#M26578</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 14px; background-color: #ffffff;"&gt;Karina&lt;/SPAN&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for feedback!&lt;/P&gt;&lt;P&gt;I have already begun studying IPU IDMAC driver.&lt;/P&gt;&lt;P&gt;Hope to make some signs of progress soon.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Apr 2013 18:44:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Specific-question-regarding-imx6-IPU-DI/m-p/262330#M26578</guid>
      <dc:creator>eugeniur</dc:creator>
      <dc:date>2013-04-08T18:44:32Z</dc:date>
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