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    <title>i.MX ProcessorsのトピックRe: imx25 interrupt vector table</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262240#M26517</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The exception vectors located at the start of internal ROM are used to map all&lt;/P&gt;&lt;P&gt;the ARM exceptions (except the reset exception) to a duplicate exception vector&lt;/P&gt;&lt;P&gt;table in iRAM, beginning from 0x7801_FFC0 address. During the boot phase, the&lt;/P&gt;&lt;P&gt;iRAM vectors point to the serial downloader &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;in iROM. &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;After boot the OS loader can &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;overwrite the vectors as required. Enclosed is an example - please pay attention on &lt;BR /&gt;function "interrupt_init()".&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 19 Feb 2013 05:52:48 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2013-02-19T05:52:48Z</dc:date>
    <item>
      <title>imx25 interrupt vector table</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262239#M26516</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;A package named m25pdk_led was forwarded to me as a result of a previous post on this forum.&amp;nbsp; It provides an example of how to create a program that executes in imx25 internal RAM.&amp;nbsp; I have used this package as a basis to create several serial downloadable, internal RAM resident, diagnostic programs.&amp;nbsp; I would like to add additional diagnostics that would require processing interrupts, so I have been looking at the file crt_for_HAB.s, part of the m25pdk_led package.&amp;nbsp; A portion of this file is included below.&amp;nbsp; It places an interrupt vector table immediately following the Flash Header.&amp;nbsp; The program that includes this file is loaded at 0x78002000, so the vector table appears to be located at 0x78002020.&amp;nbsp; I have a rudimentary question:&amp;nbsp; The ARM interrupt vector table is typically located at memory address zero, but that is within the imx25 ROM area.&amp;nbsp; How does the vector table in the code loaded in internal RAM override the vector table at address zero?&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 12pt;"&gt;&lt;SPAN lang="EN"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; .section .vectors,"ax"&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; .code 32&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 12pt;"&gt;&lt;SPAN lang="EN"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;/* flash header&amp;nbsp; - should be placed before main image */&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;app_code_jump_vector : .word&amp;nbsp; ResetHandler&lt;/P&gt;&lt;P&gt;app_code_barker : .word 0&lt;/P&gt;&lt;P&gt;app_code_csf : .word 0&lt;/P&gt;&lt;P&gt;dcd_ptr_ptr : .word app_code_csf&lt;/P&gt;&lt;P&gt;.word 0&lt;/P&gt;&lt;P&gt;.word 0&lt;/P&gt;&lt;P&gt;.word 0&lt;/P&gt;&lt;P&gt;.word 0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;/****************************************************************************/&lt;/P&gt;&lt;P&gt;/*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Vector table and reset entry&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;/****************************************************************************/&lt;/P&gt;&lt;P&gt;_vectors:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, ResetAddr&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Reset&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, UndefAddr&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Undefined instruction */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, SWIAddr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Software interrupt&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, PAbortAddr&amp;nbsp;&amp;nbsp; /* Prefetch abort&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, DAbortAddr&amp;nbsp;&amp;nbsp; /* Data abort&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, ReservedAddr /* Reserved&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, IRQAddr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* IRQ interrupt&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; ldr pc, FIQAddr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* FIQ interrupt&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 12pt;"&gt;&lt;SPAN lang="EN"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="font-size: 12pt;"&gt;&lt;SPAN lang="EN"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;ResetAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .word ResetHandler&lt;/P&gt;&lt;P&gt;UndefAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .word UndefHandler&lt;/P&gt;&lt;P&gt;SWIAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .word SWIHandler&lt;/P&gt;&lt;P&gt;PAbortAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp; .word PAbortHandler&lt;/P&gt;&lt;P&gt;DAbortAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp; .word DAbortHandler&lt;/P&gt;&lt;P&gt;ReservedAddr:&amp;nbsp; .word 0&lt;/P&gt;&lt;P&gt;IRQAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .word IRQHandler&lt;/P&gt;&lt;P&gt;FIQAddr:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .word FIQHandler&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ...&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Feb 2013 19:48:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262239#M26516</guid>
      <dc:creator>rbruce</dc:creator>
      <dc:date>2013-02-18T19:48:40Z</dc:date>
    </item>
    <item>
      <title>Re: imx25 interrupt vector table</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262240#M26517</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The exception vectors located at the start of internal ROM are used to map all&lt;/P&gt;&lt;P&gt;the ARM exceptions (except the reset exception) to a duplicate exception vector&lt;/P&gt;&lt;P&gt;table in iRAM, beginning from 0x7801_FFC0 address. During the boot phase, the&lt;/P&gt;&lt;P&gt;iRAM vectors point to the serial downloader &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;in iROM. &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;After boot the OS loader can &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;overwrite the vectors as required. Enclosed is an example - please pay attention on &lt;BR /&gt;function "interrupt_init()".&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Feb 2013 05:52:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262240#M26517</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2013-02-19T05:52:48Z</dc:date>
    </item>
    <item>
      <title>Re: imx25 interrupt vector table</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262241#M26518</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the example.&amp;nbsp; I'll try it out.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Feb 2013 14:42:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx25-interrupt-vector-table/m-p/262241#M26518</guid>
      <dc:creator>rbruce</dc:creator>
      <dc:date>2013-02-19T14:42:55Z</dc:date>
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