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    <title>i.MX ProcessorsのトピックRe: I.mx 35 UART TX and RX using SDMA</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259091#M25508</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for info. Let me go through this .. will ask you if i have any more questions &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 26 Apr 2013 06:30:59 GMT</pubDate>
    <dc:creator>amuruvenki</dc:creator>
    <dc:date>2013-04-26T06:30:59Z</dc:date>
    <item>
      <title>I.mx 35 UART TX and RX using SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259089#M25506</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am working on i.MX 35. I tried to understand uart functionality using SDMA, but i did not get clear picture . &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As per Reference manual :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DMA TX /RX interrupt will trigger on FIFO level ,&amp;nbsp; but the backs provided by SDMA , is not working as per data sheet described .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you help me to understand of SDMA for UART (or) Any document for this &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Amuru &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Apr 2013 07:18:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259089#M25506</guid>
      <dc:creator>amuruvenki</dc:creator>
      <dc:date>2013-04-10T07:18:18Z</dc:date>
    </item>
    <item>
      <title>Re: I.mx 35 UART TX and RX using SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259090#M25507</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There is a Chapter 42 in the i.MX35 Reference Manual talk about SDMA controller in details.&lt;/P&gt;&lt;P&gt;We don't have much example talk about SDMA.&lt;/P&gt;&lt;P&gt;For your reference, please read this &lt;A _jive_internal="true" href="https://community.nxp.com/message/305135#305135"&gt;https://community.freescale.com/message/305135#305135&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;Hope this information can help you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2013 03:43:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259090#M25507</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2013-04-17T03:43:43Z</dc:date>
    </item>
    <item>
      <title>Re: I.mx 35 UART TX and RX using SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259091#M25508</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for info. Let me go through this .. will ask you if i have any more questions &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Apr 2013 06:30:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-mx-35-UART-TX-and-RX-using-SDMA/m-p/259091#M25508</guid>
      <dc:creator>amuruvenki</dc:creator>
      <dc:date>2013-04-26T06:30:59Z</dc:date>
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