<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Question, i.MX6S SPDIF_SR_CLK</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259021#M25468</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you read Table 59-1 in RM Rev.1?&amp;nbsp; It clearly specifies SPDIF_SR_CLK can be routed to ENET_REF_CLK pin or GPIO_8 pin.&amp;nbsp; Regarding the accuracy, it should depend on the SPDIF_IN signal.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;1) &lt;BR /&gt;Can I understand that “SPDIF Rx Clock” is equal to “SPDIF_SR_CLK”?&lt;BR /&gt;If so, customer is able to output “SPDIF Rx Clock” to ENET_REF_CLK pin or GPIO_8 pin.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Answer) &lt;BR /&gt;SPDIF Rx Clock should be equal to SPDIF_SR_CLK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2) &lt;BR /&gt;Regarding the accuracy, SPDIF Rx Clock is generated by DPLL in SPDIF Rx block. So I think the accuracy is depend on DPLL. Is my understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Answer) &lt;BR /&gt;SPDIF Rx Clock is extracted from the SPDIF input bitstream.&amp;nbsp; That's why I said it depends on the SPDIF_IN signal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 17 Mar 2014 07:15:46 GMT</pubDate>
    <dc:creator>ShunsukeMatsuno</dc:creator>
    <dc:date>2014-03-17T07:15:46Z</dc:date>
    <item>
      <title>Question, i.MX6S SPDIF_SR_CLK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259018#M25465</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about SPDIF_SR_CLK on i.MX6Solo.&lt;/P&gt;&lt;P&gt;My customer wants to use SPDIF Rx Clock for external Codec device.&lt;/P&gt;&lt;P&gt;In Figure 59-2 ‘SPDIF transceiver Clock Diagram’ in i.MX6SDL reference manual, we can see SPDIF Rx Clock which is produced from SPDIF_IN flows out from DPLL.&lt;/P&gt;&lt;P&gt;The customer wants to use this SPDIF Rx clock for external audio codec chip.&lt;/P&gt;&lt;P&gt;(1)&lt;/P&gt;&lt;P&gt;Is it possible to output this SPDIF Rx clock from SPDIF_SR_CLK pin?&lt;/P&gt;&lt;P&gt;If it is not possible, do you have any ideas to output the clock from i.MX6(from other pin via other route)?&lt;/P&gt;&lt;P&gt;(2)&lt;/P&gt;&lt;P&gt;If it is possible to output the clock from i.MX, please let me know the accuracy of the clock signal.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Feb 2014 17:08:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259018#M25465</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2014-02-25T17:08:44Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S SPDIF_SR_CLK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259019#M25466</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for hurrying you up, but the customer needs the answer asap.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 03 Mar 2014 04:06:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259019#M25466</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2014-03-03T04:06:41Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S SPDIF_SR_CLK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259020#M25467</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am still wait for your reply.&lt;/P&gt;&lt;P&gt;Could you tell me the current progress status?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Mar 2014 07:37:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259020#M25467</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2014-03-12T07:37:31Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S SPDIF_SR_CLK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259021#M25468</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you read Table 59-1 in RM Rev.1?&amp;nbsp; It clearly specifies SPDIF_SR_CLK can be routed to ENET_REF_CLK pin or GPIO_8 pin.&amp;nbsp; Regarding the accuracy, it should depend on the SPDIF_IN signal.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;1) &lt;BR /&gt;Can I understand that “SPDIF Rx Clock” is equal to “SPDIF_SR_CLK”?&lt;BR /&gt;If so, customer is able to output “SPDIF Rx Clock” to ENET_REF_CLK pin or GPIO_8 pin.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Answer) &lt;BR /&gt;SPDIF Rx Clock should be equal to SPDIF_SR_CLK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2) &lt;BR /&gt;Regarding the accuracy, SPDIF Rx Clock is generated by DPLL in SPDIF Rx block. So I think the accuracy is depend on DPLL. Is my understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Answer) &lt;BR /&gt;SPDIF Rx Clock is extracted from the SPDIF input bitstream.&amp;nbsp; That's why I said it depends on the SPDIF_IN signal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Mar 2014 07:15:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259021#M25468</guid>
      <dc:creator>ShunsukeMatsuno</dc:creator>
      <dc:date>2014-03-17T07:15:46Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S SPDIF_SR_CLK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259022#M25469</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class="j-post-avatar" style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;SPAN class="j-status-levels" style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;&lt;IMG alt="Employee" class="jiveImage" src="https://community.nxp.com/6.0.2.0/resources/images/status/FS_EMP_40x18.png" style="font-weight: inherit; font-style: inherit; font-family: inherit;" title="Employee" /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="j-post-author" style="font-weight: inherit; font-style: inherit; font-size: 0.9em; font-family: inherit;"&gt;&lt;STRONG style="font-style: inherit; font-family: inherit;"&gt;&lt;A href="https://community.nxp.com/people/RaymondChoi"&gt;RaymondChoi&lt;/A&gt; &lt;/STRONG&gt;Mar 16, 2014 9:00 PM &lt;SPAN class="font-color-meta-light j-thread-replyto" style="padding: 0 0 0 3px; font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;"&gt;(&lt;A _jive_internal="true" class="font-color-meta-light localScroll" href="https://community.nxp.com/thread/320356#387994" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #a9a9a9;" title="Go to message"&gt;in response to Shunsuke Matsuno&lt;/A&gt;)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class="j-ui-elem j-dotted-star" style="font-weight: inherit; font-style: inherit; font-family: inherit; background-position: no-repeat no-repeat;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;1) SPDIF Rx Clock should be equal to SPDIF_SR_CLK.&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;2) SPDIF Rx Clock is extracted from the SPDIF input bitstream.&amp;nbsp; That's why I said it depends on the SPDIF_IN signal.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Best regards&lt;/P&gt;&lt;P style="font-weight: inherit; font-style: inherit; font-family: inherit;"&gt;Raymond&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Mar 2014 17:20:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-SPDIF-SR-CLK/m-p/259022#M25469</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-03-19T17:20:43Z</dc:date>
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  </channel>
</rss>

