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    <title>i.MX Processors中的主题 i.MX93 parallel diaply interface</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-parallel-diaply-interface/m-p/2413957#M246739</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am designing a board with i.MX93 (MIMX9332CVVXMAC) that has to drive a RGB display with parallel interface. From config tool the data bit are lebelled data0-23 without reference to R,G,B channel. I have also looked at evb FRDM and&amp;nbsp;TM050RDH03-41, unfortunately on FRDM the data are as in config tool and the schematic of&amp;nbsp;TM050RDH03-41 is not provided.&lt;/P&gt;&lt;P&gt;Is it possible to have such schematic for confirmig the pinout?&lt;/P&gt;&lt;P&gt;Or can you confirm me that the 24 bits can be muxed between channels R G and B freely?&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Enrico&lt;/P&gt;</description>
    <pubDate>Wed, 16 Sep 2026 09:12:19 GMT</pubDate>
    <dc:creator>EB-Tema</dc:creator>
    <dc:date>2026-09-16T09:12:19Z</dc:date>
    <item>
      <title>i.MX93 parallel diaply interface</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-parallel-diaply-interface/m-p/2413957#M246739</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am designing a board with i.MX93 (MIMX9332CVVXMAC) that has to drive a RGB display with parallel interface. From config tool the data bit are lebelled data0-23 without reference to R,G,B channel. I have also looked at evb FRDM and&amp;nbsp;TM050RDH03-41, unfortunately on FRDM the data are as in config tool and the schematic of&amp;nbsp;TM050RDH03-41 is not provided.&lt;/P&gt;&lt;P&gt;Is it possible to have such schematic for confirmig the pinout?&lt;/P&gt;&lt;P&gt;Or can you confirm me that the 24 bits can be muxed between channels R G and B freely?&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Enrico&lt;/P&gt;</description>
      <pubDate>Wed, 16 Sep 2026 09:12:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-parallel-diaply-interface/m-p/2413957#M246739</guid>
      <dc:creator>EB-Tema</dc:creator>
      <dc:date>2026-09-16T09:12:19Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 parallel diaply interface</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-parallel-diaply-interface/m-p/2414116#M246747</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Thank you for your interest in NXP Semiconductor products,&lt;/P&gt;
&lt;P&gt;Please see the TM050RDH03-41 display connector schematic, if you are interested in the full schematic, please create a technical case.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="JosephAtNXP_0-1789574219944.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396491i6D4DB69EB434C7C1/image-size/large?v=v2&amp;amp;px=999" role="button" title="JosephAtNXP_0-1789574219944.png" alt="JosephAtNXP_0-1789574219944.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Wed, 16 Sep 2026 15:57:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-parallel-diaply-interface/m-p/2414116#M246747</guid>
      <dc:creator>JosephAtNXP</dc:creator>
      <dc:date>2026-09-16T15:57:13Z</dc:date>
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