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    <title>topic Re: iMX8qm Boot Core A72_0 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408739#M246531</link>
    <description>&lt;P&gt;For your specific procedure, the important point is this:&lt;/P&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;P&gt;is the correct target conceptually&amp;nbsp;&lt;STRONG&gt;if your intent is to load the bootloader to the A72 instead of the A53&lt;/STRONG&gt;&amp;nbsp;. NXP community guidance describes&amp;nbsp;flash_ca72&amp;nbsp;as similar to the basic&amp;nbsp;flash_b0&amp;nbsp;image, but loaded to the&amp;nbsp;&lt;STRONG&gt;A72&lt;/STRONG&gt;&amp;nbsp;rather than the&amp;nbsp;&lt;STRONG&gt;A53&lt;/STRONG&gt;&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;The “no logs” symptom does&amp;nbsp;&lt;STRONG&gt;not automatically mean SCFW rejected A72 boot&lt;/STRONG&gt;&amp;nbsp;. A known gotcha is that&amp;nbsp;&lt;STRONG&gt;A53 and A72 do not use the same log terminal&lt;/STRONG&gt;&amp;nbsp;, so if you monitor the usual A-core/A53 UART you may see nothing even though the A72 image is running or failing later on a different console path.&lt;/P&gt;
&lt;P&gt;Validation of your steps:&lt;/P&gt;
&lt;TABLE width="710"&gt;
&lt;THEAD&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;&lt;STRONG&gt;Area&lt;/STRONG&gt;&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;&lt;STRONG&gt;Assessment&lt;/STRONG&gt;&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;/THEAD&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SECO container&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;mx8qmb0-ahab-container.img&amp;nbsp;is the right class of container for i.MX8QM B0.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;ATF&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;make PLAT=imx8qm bl31&amp;nbsp;is reasonable for i.MX8QM.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SCFW&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;Building&amp;nbsp;make qm R=B0 B=var_som V=1&amp;nbsp;is consistent with an i.MX8QM B0 Variscite target.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;U-Boot&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;imx8qm_var_som_defconfig&amp;nbsp;is the key item to confirm: it must be compatible with the A72 boot path and console configuration.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;mkimage target&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;flash_ca72&amp;nbsp;is the right target only for A72 boot. For normal Linux BSP boot, the documented i.MX8QM command is&amp;nbsp;make SOC=iMX8QM flash&amp;nbsp;.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SPL copy&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;u-boot-spl.bin&amp;nbsp;is likely irrelevant for&amp;nbsp;flash_ca72&amp;nbsp;; that target is not the SPL-based flow.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;Duplicate image build&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;Running both top-level&amp;nbsp;make SOC=iMX8QM flash_ca72&amp;nbsp;and then manually running&amp;nbsp;make -f soc.mak ... flash_ca72&amp;nbsp;is unnecessary. Use one clean top-level command.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;P&gt;I would correct/clean the image-generation part to:&lt;/P&gt;
&lt;P&gt;cd ~/iMX8/Scarthgap_New/MkImage/imx-mkimage&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;cp ../../SECO/imx-seco-5.9.4.1-0333596/firmware/seco/mx8qmb0-ahab-container.img ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../SCFW/imx-sc-firmware/src/scfw_export_mx8qm_b0/build_mx8qm_b0/scfw_tcm.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../u-boot/uboot-imx/u-boot.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../ATF/imx-atf/build/imx8qm/release/bl31.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;make clean&lt;/P&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;P&gt;Then use:&lt;/P&gt;
&lt;P&gt;iMX8QM/flash.bin&lt;/P&gt;
&lt;P&gt;Also fix/check this SCFW path:&lt;/P&gt;
&lt;P&gt;export TOOLS=/home/mkashyap/iMX8/Scarthgap_New/SCFW/Opt&lt;/P&gt;
&lt;P&gt;You extracted into&amp;nbsp;./opt&amp;nbsp;, but exported&amp;nbsp;.../SCFW/Opt&amp;nbsp;. Linux paths are case-sensitive. Since you did produce&amp;nbsp;scfw_tcm.bin&amp;nbsp;, your actual shell may have had a valid tool path, but this line should be verified.&lt;/P&gt;
&lt;P&gt;Recommended debug sequence:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;First build and boot the&amp;nbsp;&lt;STRONG&gt;standard&lt;/STRONG&gt;&amp;nbsp;image:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;make SOC=iMX8QM flash&lt;/P&gt;
&lt;P&gt;This checks that SECO + SCFW + ATF + U-Boot + board DDR/console are basically correct. The Linux User’s Guide documents this standard i.MX8QM&amp;nbsp;flash.bin&amp;nbsp;generation path.&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Then rebuild with:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Monitor the&amp;nbsp;&lt;STRONG&gt;A72 console/UART&lt;/STRONG&gt;&amp;nbsp;, not only the normal A53 console. The A53 and A72 log terminals differ.&lt;/LI&gt;
&lt;/UL&gt;
&lt;UL&gt;
&lt;LI&gt;If still silent, compare the generated&amp;nbsp;flash.bin&amp;nbsp;size/layout between&amp;nbsp;flash&amp;nbsp;and&amp;nbsp;flash_ca72&amp;nbsp;, and confirm that the Variscite U-Boot config actually enables the console used by the A72 boot target.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;So the direct answer is:&amp;nbsp;&lt;STRONG&gt;SCFW does permit starting the Cortex-A side on A72 through the&amp;nbsp;flash_ca72&amp;nbsp;image flow, but SCFW still owns the initial boot orchestration. Your procedure is mostly valid for A72 boot, but remove the duplicate&amp;nbsp;soc.mak&amp;nbsp;invocation, verify the SCFW tool path, and most importantly check the A72 UART/console.&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;Takeaway: A72 boot on i.MX8QM is supported via&amp;nbsp;flash_ca72&amp;nbsp;; a silent boot is more likely an image/config/console issue than SCFW simply refusing to start A72.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 27 Aug 2026 08:35:45 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2026-08-27T08:35:45Z</dc:date>
    <item>
      <title>iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2407908#M246492</link>
      <description>&lt;P&gt;Hello NXP Forum,&lt;/P&gt;&lt;P&gt;on iMX8qm,&amp;nbsp;&lt;SPAN&gt;can we have the bootup done from A72 core? Does SCUFW permit that.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 25 Aug 2026 01:33:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2407908#M246492</guid>
      <dc:creator>kamohan</dc:creator>
      <dc:date>2026-08-25T01:33:10Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408076#M246502</link>
      <description>&lt;P&gt;Yes — on i.MX8QM, the application-processor boot image can be targeted to the Cortex-A72 instead of the Cortex-A53, and SCFW permits that flow. NXP’s&amp;nbsp;imx-mkimage&amp;nbsp;has a&amp;nbsp;flash_ca72&amp;nbsp;target described as the A72 variant of the normal A53 boot image, intended to bring up the A72 as early as possible for boot-time optimization&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;The important distinction is:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;&lt;STRONG&gt;First code after reset:&lt;/STRONG&gt;&amp;nbsp;not the A72. The device boot flow still starts through ROM/SCU/SCFW.&lt;/LI&gt;
&lt;LI&gt;&lt;STRONG&gt;AP-side bootloader / OS bring-up:&lt;/STRONG&gt;&amp;nbsp;yes, this can be done on the A72. SCFW initializes DDR, loads Cortex-A images, then boots the cores and sets their start addresses.&lt;/LI&gt;
&lt;LI&gt;&lt;STRONG&gt;Configuration mechanism:&lt;/STRONG&gt;&amp;nbsp;the boot container can specify an AP image for&amp;nbsp;a72&amp;nbsp;, e.g. examples show&amp;nbsp;-ap ... a72 ...&amp;nbsp;in&amp;nbsp;imx-mkimage&amp;nbsp;usage.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;So the answer is:&amp;nbsp;&lt;STRONG&gt;SCFW does allow booting the AP software path from A72, but A72 is not the reset/ROM boot master; it is started by SCFW according to the boot container configuration.&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 25 Aug 2026 07:43:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408076#M246502</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2026-08-25T07:43:54Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408323#M246512</link>
      <description>There is a small point we would like to clarify/validate: the `flash_ca72` target currently references `u-boot-atf.bin`, while a separate `u-boot-atf-a72.bin` is also available in the same configuration.&lt;BR /&gt;&lt;BR /&gt;How do we proceed</description>
      <pubDate>Wed, 26 Aug 2026 03:22:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408323#M246512</guid>
      <dc:creator>kamohan</dc:creator>
      <dc:date>2026-08-26T03:22:28Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408335#M246513</link>
      <description>&lt;P&gt;Proceed with the existing&amp;nbsp;flash_ca72&amp;nbsp;target first; do&amp;nbsp;&lt;STRONG&gt;not&lt;/STRONG&gt;&amp;nbsp;replace&amp;nbsp;u-boot-atf.bin&amp;nbsp;with&amp;nbsp;u-boot-atf-a72.bin&amp;nbsp;unless you are intentionally using the cockpit / multi-AP image flow.&lt;/P&gt;
&lt;P&gt;The evidence points to this distinction:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;flash_ca72&amp;nbsp;is described as the same basic boot image as the normal A-core boot target, but loaded to the A72 instead of the A53.&lt;/LI&gt;
&lt;LI&gt;u-boot-atf.bin&amp;nbsp;is the combined ATF + U-Boot image:&amp;nbsp;bl31.bin&amp;nbsp;plus&amp;nbsp;u-boot.bin&amp;nbsp;/&amp;nbsp;u-boot-hash.bin&amp;nbsp;.&lt;/LI&gt;
&lt;LI&gt;u-boot-atf-a72.bin&amp;nbsp;appears in the&amp;nbsp;flash_cockpit&amp;nbsp;target, where the image contains&amp;nbsp;&lt;STRONG&gt;two AP payloads&lt;/STRONG&gt;&amp;nbsp;: one for A53 and a separate one for A72:&amp;nbsp;-ap u-boot-atf.bin a53 0x80000000 ... -ap u-boot-atf-a72.bin a72 0xC0000000 ...&amp;nbsp;.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;So the important selector is not only the filename; it is the&amp;nbsp;imx-mkimage&amp;nbsp;-ap ... a72 ...&amp;nbsp;argument in the target. For a single A72 boot image,&amp;nbsp;flash_ca72&amp;nbsp;using&amp;nbsp;u-boot-atf.bin&amp;nbsp;is consistent with the documented intent: the payload is loaded to A72 by the target rule, even if the filename is not suffixed&amp;nbsp;-a72&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;Recommended path:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Build the standard A72-only image using the existing target:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Use the CA72 device tree / configuration on the Linux side. NXP documentation notes that the i.MX8QM MEK CA72 DTB supports the two Cortex-A72 cores only and requires the special boot image built with&amp;nbsp;flash_ca72&amp;nbsp;.&lt;/LI&gt;
&lt;/UL&gt;
&lt;UL&gt;
&lt;LI&gt;Reserve&amp;nbsp;u-boot-atf-a72.bin&amp;nbsp;for flows that explicitly package a second A72 AP image, such as&amp;nbsp;flash_cockpit&amp;nbsp;, unless your BSP’s&amp;nbsp;soc.mak&amp;nbsp;comments or release notes say otherwise.&lt;/LI&gt;
&lt;/UL&gt;
&lt;UL&gt;
&lt;LI&gt;Validate at boot that the image is actually entering the A72 path: check the&amp;nbsp;imx-mkimage&amp;nbsp;command emitted by&amp;nbsp;make V=1 SOC=iMX8QM flash_ca72&amp;nbsp;or inspect&amp;nbsp;iMX8QM/soc.mak&amp;nbsp;and confirm the AP line uses&amp;nbsp;a72&amp;nbsp;.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;Takeaway: treat the current&amp;nbsp;flash_ca72&amp;nbsp;reference to&amp;nbsp;u-boot-atf.bin&amp;nbsp;as intentional;&amp;nbsp;u-boot-atf-a72.bin&amp;nbsp;is for the separate A72 payload used in cockpit/multi-partition style images, not automatically the replacement for&amp;nbsp;flash_ca72&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 26 Aug 2026 03:43:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408335#M246513</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2026-08-26T03:43:11Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408687#M246527</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have followed the following steps to build bootloader, but the bootloader fails without any logs.&lt;/P&gt;&lt;P&gt;Could you please validate attached steps.&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;mkdir Scarthgap_New&lt;/DIV&gt;&lt;DIV&gt;cd Scarthgap_New&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;1. Get the Security Controller Binaries&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mkdir SECO&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cd SECO&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;wget &lt;A href="https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-5.9.4.1-0333596.bin" target="_blank"&gt;https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-5.9.4.1-0333596.bin&lt;/A&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;chmod +x imx-seco-5.9.4.1-0333596.bin&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;./imx-seco-5.9.4.1-0333596.bin&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mkashyap@cse-dev02:~/iMX8/Scarthgap_New/SECO/imx-seco-5.9.4.1-0333596/firmware/seco$ ls -al&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;total 976&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 2 mkashyap mkashyap&amp;nbsp; &amp;nbsp;4096 Aug 26 22:21 .&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 3 mkashyap mkashyap&amp;nbsp; &amp;nbsp;4096 Aug 26 22:21 ..&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 194 Jul 29&amp;nbsp; 2024 commit-id.txt&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap 163840 Jul 29&amp;nbsp; 2024 mx8dxla1-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap 163840 Jul 29&amp;nbsp; 2024 mx8dxlb0-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap&amp;nbsp; 76944 Jul 29&amp;nbsp; 2024 mx8qmb0-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap&amp;nbsp; 71312 Jul 29&amp;nbsp; 2024 mx8qxb0-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rw-r--r-- 1 mkashyap mkashyap&amp;nbsp; 78408 Jul 29&amp;nbsp; 2024 mx8qxc0-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rwxr-xr-x 1 mkashyap mkashyap 423875 Jul 29&amp;nbsp; 2024 SECO_FW_release_note.pdf&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mkashyap@cse-dev02:~/iMX8/Scarthgap_New/SECO/imx-seco-5.9.4.1-0333596/firmware/seco$&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;we use mx8qmb0-ahab-container.img&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cd ../../../..&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;2. Download and build ATF&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mkdir ATF&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cd ATF&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;git clone &lt;A href="https://github.com/varigit/imx-atf" target="_blank"&gt;https://github.com/varigit/imx-atf&lt;/A&gt; -b lf_v2.10_6.6.52-2.2.0_var01&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cd imx-atf&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;source /opt/fsl-imx-xwayland/6.6-scarthgap/environment-setup-armv8a-poky-linux&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;unset LDFLAGS&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;make PLAT=imx8qm bl31&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mkashyap@cse-dev02:~/iMX8/Scarthgap_New/ATF/imx-atf/build/imx8qm/release$ ls -al&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;total 76&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 7 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 .&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 3 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:36 ..&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 3 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 bl31&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-rwxrwxr-x 1 mkashyap mkashyap 45213 Aug 26 22:37 bl31.bin&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 2 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 lib&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 2 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 libc&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 2 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 libwrapper&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;drwxrwxr-x 2 mkashyap mkashyap&amp;nbsp; 4096 Aug 26 22:37 romlib&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cd ../../../../../&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;3. Download and build SCFW&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;mkdir SCFW&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd SCFW&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;wget &lt;A href="https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2018q4/gcc-arm-none-eabi-8-2018-q4-major-linux.tar.bz" target="_blank"&gt;https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2018q4/gcc-arm-none-eabi-8-2018-q4-major-linux.tar.bz&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;sudo tar xf gcc-arm-none-eabi-8-2018-q4-major-linux.tar.bz -C ./opt&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;git clone &lt;A href="https://github.com/varigit/imx-sc-firmware.git" target="_blank"&gt;https://github.com/varigit/imx-sc-firmware.git&lt;/A&gt; -b 1.17.0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd imx-sc-firmware/src/scfw_export_mx8qm_b0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;export TOOLS=/home/mkashyap/iMX8/Scarthgap_New/SCFW/Opt&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make clean-qm&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make qm R=B0 B=var_som V=1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;mkashyap@cse-dev02:~/iMX8/Scarthgap_New/SCFW/imx-sc-firmware/src/scfw_export_mx8qm_b0/build_mx8qm_b0$ ls -al&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;total 3384&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x 11 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:47 .&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 6 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:47 ..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 3 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:47 board&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 3 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 devices&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x 25 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:47 drivers&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 2 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 main&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; 184448 Aug 26 22:47 scfw_tcm.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap 2787784 Aug 26 22:47 scfw_tcm.elf&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; 513123 Aug 26 22:47 scfw_tcm.map&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 4 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 soc&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x 26 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 ss&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 9 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:47 svc&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x 10 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 test&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 2 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:44 utilities&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd ../../../../../&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;4. Build u-boot&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;mkdir u-boot&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd u-boot&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;git clone &lt;A href="https://github.com/varigit/uboot-imx.git" target="_blank"&gt;https://github.com/varigit/uboot-imx.git&lt;/A&gt; -b lf_v2024.04_6.6.52-2.2.0_var01&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd uboot-imx&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../SECO/imx-seco-5.9.4.1-0333596/firmware/seco/mx8qmb0-ahab-container.img ./mx8qm-ahab-container.img&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../SCFW/imx-sc-firmware/src/scfw_export_mx8qm_b0/build_mx8qm_b0/scfw_tcm.bin ./mx8qm-mek-scfw-tcm.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make mrproper&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make imx8qm_var_som_defconfig&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make -j8&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd ../../&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;5. Make Image&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;mkdir MkImage&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd MkImage&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;git clone &lt;A href="https://github.com/varigit/imx-mkimage" target="_blank"&gt;https://github.com/varigit/imx-mkimage&lt;/A&gt; -b lf-6.6.52_2.2.0_var01&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd imx-mkimage&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../SECO/imx-seco-5.9.4.1-0333596/firmware/seco/mx8qmb0-ahab-container.img ./iMX8QM/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../SCFW/imx-sc-firmware/src/scfw_export_mx8qm_b0/build_mx8qm_b0/scfw_tcm.bin ./iMX8QM/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../u-boot/uboot-imx/u-boot.bin ./iMX8QM/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../u-boot/uboot-imx/spl/u-boot-spl.bin ./iMX8QM/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cp ../../ATF/imx-atf/build/imx8qm/release/bl31.bin ./iMX8QM/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make SOC=iMX8QM flash_ca72&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;cd iMX8QM&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;make -f soc.mak SOC=iMX8QM MKIMG=../mkimage_imx8 PAD_IMAGE=./pad_image.sh flash_ca72&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;mkashyap@cse-dev02:~/iMX8/Scarthgap_New/MkImage/imx-mkimage/iMX8QM$ ls -al&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;total 6792&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 3 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 23:08 .&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x 13 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 23:06 ..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp;45213 Aug 26 23:06 bl31.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 2564 Aug 26 22:59 expand_c_define.sh&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap 1895424 Aug 26 23:08 flash.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;9 Aug 26 23:06 head.hash&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 2078 Aug 26 22:59 mkimage_fit_atf.sh&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-r--r--&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp;76944 Aug 26 23:02 mx8qmb0-ahab-container.img&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; 184448 Aug 26 23:03 scfw_tcm.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;drwxrwxr-x&amp;nbsp; 2 mkashyap mkashyap&amp;nbsp; &amp;nbsp; 4096 Aug 26 22:59 scripts&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; &amp;nbsp;13271 Aug 26 22:59 soc.mak&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rwxrwxr-x&amp;nbsp; 1 mkashyap mkashyap 1631521 Aug 26 23:06 u-boot-atf.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap 1500440 Aug 26 23:04 u-boot.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap 1500449 Aug 26 23:06 u-boot-hash.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;-rw-rw-r--&amp;nbsp; 1 mkashyap mkashyap&amp;nbsp; 139387 Aug 26 23:04 u-boot-spl.bin&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The generated flash.bin was used as an bootloader image&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Aug 2026 06:39:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408687#M246527</guid>
      <dc:creator>kamohan</dc:creator>
      <dc:date>2026-08-27T06:39:49Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8qm Boot Core A72_0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408739#M246531</link>
      <description>&lt;P&gt;For your specific procedure, the important point is this:&lt;/P&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;P&gt;is the correct target conceptually&amp;nbsp;&lt;STRONG&gt;if your intent is to load the bootloader to the A72 instead of the A53&lt;/STRONG&gt;&amp;nbsp;. NXP community guidance describes&amp;nbsp;flash_ca72&amp;nbsp;as similar to the basic&amp;nbsp;flash_b0&amp;nbsp;image, but loaded to the&amp;nbsp;&lt;STRONG&gt;A72&lt;/STRONG&gt;&amp;nbsp;rather than the&amp;nbsp;&lt;STRONG&gt;A53&lt;/STRONG&gt;&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;The “no logs” symptom does&amp;nbsp;&lt;STRONG&gt;not automatically mean SCFW rejected A72 boot&lt;/STRONG&gt;&amp;nbsp;. A known gotcha is that&amp;nbsp;&lt;STRONG&gt;A53 and A72 do not use the same log terminal&lt;/STRONG&gt;&amp;nbsp;, so if you monitor the usual A-core/A53 UART you may see nothing even though the A72 image is running or failing later on a different console path.&lt;/P&gt;
&lt;P&gt;Validation of your steps:&lt;/P&gt;
&lt;TABLE width="710"&gt;
&lt;THEAD&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;&lt;STRONG&gt;Area&lt;/STRONG&gt;&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;&lt;STRONG&gt;Assessment&lt;/STRONG&gt;&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;/THEAD&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SECO container&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;mx8qmb0-ahab-container.img&amp;nbsp;is the right class of container for i.MX8QM B0.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;ATF&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;make PLAT=imx8qm bl31&amp;nbsp;is reasonable for i.MX8QM.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SCFW&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;Building&amp;nbsp;make qm R=B0 B=var_som V=1&amp;nbsp;is consistent with an i.MX8QM B0 Variscite target.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;U-Boot&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;imx8qm_var_som_defconfig&amp;nbsp;is the key item to confirm: it must be compatible with the A72 boot path and console configuration.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;mkimage target&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;flash_ca72&amp;nbsp;is the right target only for A72 boot. For normal Linux BSP boot, the documented i.MX8QM command is&amp;nbsp;make SOC=iMX8QM flash&amp;nbsp;.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;SPL copy&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;u-boot-spl.bin&amp;nbsp;is likely irrelevant for&amp;nbsp;flash_ca72&amp;nbsp;; that target is not the SPL-based flow.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;Duplicate image build&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;Running both top-level&amp;nbsp;make SOC=iMX8QM flash_ca72&amp;nbsp;and then manually running&amp;nbsp;make -f soc.mak ... flash_ca72&amp;nbsp;is unnecessary. Use one clean top-level command.&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;P&gt;I would correct/clean the image-generation part to:&lt;/P&gt;
&lt;P&gt;cd ~/iMX8/Scarthgap_New/MkImage/imx-mkimage&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;cp ../../SECO/imx-seco-5.9.4.1-0333596/firmware/seco/mx8qmb0-ahab-container.img ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../SCFW/imx-sc-firmware/src/scfw_export_mx8qm_b0/build_mx8qm_b0/scfw_tcm.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../u-boot/uboot-imx/u-boot.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;cp ../../ATF/imx-atf/build/imx8qm/release/bl31.bin ./iMX8QM/&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;make clean&lt;/P&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;P&gt;Then use:&lt;/P&gt;
&lt;P&gt;iMX8QM/flash.bin&lt;/P&gt;
&lt;P&gt;Also fix/check this SCFW path:&lt;/P&gt;
&lt;P&gt;export TOOLS=/home/mkashyap/iMX8/Scarthgap_New/SCFW/Opt&lt;/P&gt;
&lt;P&gt;You extracted into&amp;nbsp;./opt&amp;nbsp;, but exported&amp;nbsp;.../SCFW/Opt&amp;nbsp;. Linux paths are case-sensitive. Since you did produce&amp;nbsp;scfw_tcm.bin&amp;nbsp;, your actual shell may have had a valid tool path, but this line should be verified.&lt;/P&gt;
&lt;P&gt;Recommended debug sequence:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;First build and boot the&amp;nbsp;&lt;STRONG&gt;standard&lt;/STRONG&gt;&amp;nbsp;image:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;make SOC=iMX8QM flash&lt;/P&gt;
&lt;P&gt;This checks that SECO + SCFW + ATF + U-Boot + board DDR/console are basically correct. The Linux User’s Guide documents this standard i.MX8QM&amp;nbsp;flash.bin&amp;nbsp;generation path.&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Then rebuild with:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;make SOC=iMX8QM flash_ca72&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Monitor the&amp;nbsp;&lt;STRONG&gt;A72 console/UART&lt;/STRONG&gt;&amp;nbsp;, not only the normal A53 console. The A53 and A72 log terminals differ.&lt;/LI&gt;
&lt;/UL&gt;
&lt;UL&gt;
&lt;LI&gt;If still silent, compare the generated&amp;nbsp;flash.bin&amp;nbsp;size/layout between&amp;nbsp;flash&amp;nbsp;and&amp;nbsp;flash_ca72&amp;nbsp;, and confirm that the Variscite U-Boot config actually enables the console used by the A72 boot target.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;So the direct answer is:&amp;nbsp;&lt;STRONG&gt;SCFW does permit starting the Cortex-A side on A72 through the&amp;nbsp;flash_ca72&amp;nbsp;image flow, but SCFW still owns the initial boot orchestration. Your procedure is mostly valid for A72 boot, but remove the duplicate&amp;nbsp;soc.mak&amp;nbsp;invocation, verify the SCFW tool path, and most importantly check the A72 UART/console.&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;Takeaway: A72 boot on i.MX8QM is supported via&amp;nbsp;flash_ca72&amp;nbsp;; a silent boot is more likely an image/config/console issue than SCFW simply refusing to start A72.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Aug 2026 08:35:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8qm-Boot-Core-A72-0/m-p/2408739#M246531</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2026-08-27T08:35:45Z</dc:date>
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