https://community.nxp.com/t5/i-MX-Processors/Pad-Mux-Control-for-ADC/m-p/2383279#M245707 <P>Hello. We are currently developing the firmware for a custom i.MX8X carrier board. For the ADC_IN0 - ADC_IN5, we are currently unsure what the pad/mux control configurations should be, specifically for the sw_config field.</P><P>If we set the field value to "Default," does it automatically configure it to the mux mode that the pad is set to (i.e. automatically adjusted to ADC versus if we were to change it to the GPIO)?</P><P>Would setting it to "Default" be a good choice, or is there a better field selection for the ADC pins?</P> Thu, 18 Jun 2026 19:36:46 GMT mchang 2026-06-18T19:36:46Z https://community.nxp.com/t5/i-MX-Processors/Pad-Mux-Control-for-ADC/m-p/2383279#M245707 <P>Hello. We are currently developing the firmware for a custom i.MX8X carrier board. For the ADC_IN0 - ADC_IN5, we are currently unsure what the pad/mux control configurations should be, specifically for the sw_config field.</P><P>If we set the field value to "Default," does it automatically configure it to the mux mode that the pad is set to (i.e. automatically adjusted to ADC versus if we were to change it to the GPIO)?</P><P>Would setting it to "Default" be a good choice, or is there a better field selection for the ADC pins?</P> Thu, 18 Jun 2026 19:36:46 GMT https://community.nxp.com/t5/i-MX-Processors/Pad-Mux-Control-for-ADC/m-p/2383279#M245707 mchang 2026-06-18T19:36:46Z https://community.nxp.com/t5/i-MX-Processors/Pad-Mux-Control-for-ADC/m-p/2383576#M245714 <P>Hello,<BR /><BR />“Default” does NOT adapt to mux mode and is not ADC-aware.<BR />For ADC pins on i.MX8X, explicitly configure the pad control to disable all pulls/keepers and minimize digital influence.<BR /><BR />Best regards/Saludos,<BR />Aldo.</P> Fri, 19 Jun 2026 21:01:42 GMT https://community.nxp.com/t5/i-MX-Processors/Pad-Mux-Control-for-ADC/m-p/2383576#M245714 AldoG 2026-06-19T21:01:42Z