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    <title>topic Re: Custom RAM Timing Fails &amp;amp;amp; Absolute Blind Debugging in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2382236#M245679</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Is your DDR&amp;nbsp;LPDDR4x? because i.mx8mPlus only supports LPDDR4, not LPDDR4&lt;STRONG&gt;x&lt;/STRONG&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 17 Jun 2026 03:57:40 GMT</pubDate>
    <dc:creator>Oswalag</dc:creator>
    <dc:date>2026-06-17T03:57:40Z</dc:date>
    <item>
      <title>Custom RAM Timing Fails &amp;amp; Absolute Blind Debugging</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2380793#M245646</link>
      <description>&lt;P&gt;Hello NXP Community,&lt;/P&gt;&lt;P&gt;I am bringing up a custom board based on the i.MX 8M Plus EVK. The design is almost identical, but with two major issues:&lt;/P&gt;&lt;P&gt;RAM: We use a different LPDDR4 IC: B3221XM3BDGVI-U.&lt;/P&gt;&lt;P&gt;Zero Visibility: The board has no UART/Debug console exposed and no status LEDs connected to GPIOs. I am completely blind.&lt;/P&gt;&lt;P&gt;I am trying to boot a Yocto core-image-minimal (U-Boot 2025.04) and force the SD card (usdhc2) to 3.3V.&lt;/P&gt;&lt;P&gt;What I did &amp;amp; Results:&lt;BR /&gt;SD Card Mod: Added no-1-8-v; and max-frequency = &amp;lt;25000000&amp;gt;; to the device tree. (Works on official EVK, forces 3.3V).&lt;/P&gt;&lt;P&gt;RAM Mod: Generated lpddr4_timing.c via i.MX Configuration Tool and replaced it in U-Boot.&lt;/P&gt;&lt;P&gt;The Problem: The official EVK fails to boot as soon as I flash the custom RAM timing. The custom board shows no signs of life with both modifications.&lt;/P&gt;&lt;P&gt;My Questions:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Since the official EVK fails to boot as soon as I inject the new lpddr4_timing.c, it's highly likely that my RAM configuration or the way I integrate it into U-Boot is broken. Are there any specific pitfalls when applying i.MX Config Tool outputs to U-Boot 2025.04? Do I need to modify spl.c or any header files regarding the RAM size/mapping besides just swapping lpddr4_timing.c?&lt;/LI&gt;&lt;LI&gt;Given that I have zero debug console access on the custom board, what are the best practices to diagnose where the boot loop or hang occurs?&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Fri, 12 Jun 2026 11:03:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2380793#M245646</guid>
      <dc:creator>tek_en</dc:creator>
      <dc:date>2026-06-12T11:03:11Z</dc:date>
    </item>
    <item>
      <title>Re: Custom RAM Timing Fails &amp;amp; Absolute Blind Debugging</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2382236#M245679</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Is your DDR&amp;nbsp;LPDDR4x? because i.mx8mPlus only supports LPDDR4, not LPDDR4&lt;STRONG&gt;x&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jun 2026 03:57:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2382236#M245679</guid>
      <dc:creator>Oswalag</dc:creator>
      <dc:date>2026-06-17T03:57:40Z</dc:date>
    </item>
    <item>
      <title>Re: Custom RAM Timing Fails &amp;amp; Absolute Blind Debugging</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2382571#M245689</link>
      <description>Hi,&lt;BR /&gt;Thank you for your answer. We just figured out this was the problem and ordered W66DP2RQQAHJ RAM from the list nxp provided. We will see if this will solve everything. Love to hear if anyone has any experience regarding this RAM and/or using a different RAM in a custom board. Any tips or tricks?</description>
      <pubDate>Wed, 17 Jun 2026 14:04:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Custom-RAM-Timing-Fails-amp-amp-Absolute-Blind-Debugging/m-p/2382571#M245689</guid>
      <dc:creator>tek_en</dc:creator>
      <dc:date>2026-06-17T14:04:32Z</dc:date>
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