Custom RAM Timing Fails & Absolute Blind Debugging

tek_en — Fri, 12 Jun 2026 11:03:11 GMT

Hello NXP Community,

I am bringing up a custom board based on the i.MX 8M Plus EVK. The design is almost identical, but with two major issues:

RAM: We use a different LPDDR4 IC: B3221XM3BDGVI-U.

Zero Visibility: The board has no UART/Debug console exposed and no status LEDs connected to GPIOs. I am completely blind.

I am trying to boot a Yocto core-image-minimal (U-Boot 2025.04) and force the SD card (usdhc2) to 3.3V.

What I did & Results:
SD Card Mod: Added no-1-8-v; and max-frequency = <25000000>; to the device tree. (Works on official EVK, forces 3.3V).

RAM Mod: Generated lpddr4_timing.c via i.MX Configuration Tool and replaced it in U-Boot.

The Problem: The official EVK fails to boot as soon as I flash the custom RAM timing. The custom board shows no signs of life with both modifications.

My Questions:

Since the official EVK fails to boot as soon as I inject the new lpddr4_timing.c, it's highly likely that my RAM configuration or the way I integrate it into U-Boot is broken. Are there any specific pitfalls when applying i.MX Config Tool outputs to U-Boot 2025.04? Do I need to modify spl.c or any header files regarding the RAM size/mapping besides just swapping lpddr4_timing.c?
Given that I have zero debug console access on the custom board, what are the best practices to diagnose where the boot loop or hang occurs?

topic Custom RAM Timing Fails &amp; Absolute Blind Debugging in i.MX Processors

Custom RAM Timing Fails & Absolute Blind Debugging

topic Custom RAM Timing Fails & Absolute Blind Debugging in i.MX Processors