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    <title>topic i.MX6 SSI PLL frequency question in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256292#M24557</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am checking the datasheet of i.MX6 for the SSI interface, i saw there is a PLL freq 688.128MHZ shows in the table 64-6 as following picture, i am wondering how they got that frequency?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="q1.JPG.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/40444i047B5576CE4B6C12/image-size/large?v=v2&amp;amp;px=999" role="button" title="q1.JPG.jpg" alt="q1.JPG.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 15 Aug 2013 08:48:57 GMT</pubDate>
    <dc:creator>uolli</dc:creator>
    <dc:date>2013-08-15T08:48:57Z</dc:date>
    <item>
      <title>i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256292#M24557</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am checking the datasheet of i.MX6 for the SSI interface, i saw there is a PLL freq 688.128MHZ shows in the table 64-6 as following picture, i am wondering how they got that frequency?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="q1.JPG.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/40444i047B5576CE4B6C12/image-size/large?v=v2&amp;amp;px=999" role="button" title="q1.JPG.jpg" alt="q1.JPG.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Aug 2013 08:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256292#M24557</guid>
      <dc:creator>uolli</dc:creator>
      <dc:date>2013-08-15T08:48:57Z</dc:date>
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    <item>
      <title>Re: i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256293#M24558</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, uolli&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I saw audio PLL from CCM, I think its freq is set like this: PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM), there are NUM and DENOM can be set to different value, so I think it is possible to get 688.128MHz. such as , DIV_SELECT = 28, NUM = 672, DENOM = 1000, then PLL output will be 24MHz * 28.672 = 688.128MHz. And SSI can be sourced from audio PLL.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 16 Aug 2013 03:03:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256293#M24558</guid>
      <dc:creator>AnsonHuang</dc:creator>
      <dc:date>2013-08-16T03:03:06Z</dc:date>
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    <item>
      <title>Re: i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256294#M24559</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you, Yongcai.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, does the freescale has some documents for the SSI how to set as a network mode, i want set SSI working in network mode, with 2.048MHZ T/R clock, with 8K sync clock. also, i checked the source codes for BSP for support codec wm8962, they used SSI 1 for AUDMUX, internal port of AUDMUX is 2, external port is 4, i can saw how to configure the AUDMUX for port2 and 4, but i don't how the SSI 1 to connect to AUDMUX internal port 2. thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 17 Aug 2013 02:20:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256294#M24559</guid>
      <dc:creator>uolli</dc:creator>
      <dc:date>2013-08-17T02:20:43Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256295#M24560</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI，uolli&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Sorry, I am not familiar with SSI module, I am just familiar with PLL and clock, you may need to create another topic for SSI, hope there will be someone helping you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 18 Aug 2013 02:10:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256295#M24560</guid>
      <dc:creator>AnsonHuang</dc:creator>
      <dc:date>2013-08-18T02:10:46Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256296#M24561</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you, Yongcai.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 18 Aug 2013 04:36:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256296#M24561</guid>
      <dc:creator>uolli</dc:creator>
      <dc:date>2013-08-18T04:36:50Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 SSI PLL frequency question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256297#M24562</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How do you source ssi from PLL? &lt;/P&gt;&lt;P&gt;I would like to have a ssi sys clk set to 12.288 or 11.2896 in order to get my different sample rate but i dont find how to do this in imx_ssi.c or anywhere else ...&lt;/P&gt;&lt;P&gt;Best regards.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Oct 2013 20:35:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SSI-PLL-frequency-question/m-p/256297#M24562</guid>
      <dc:creator>dabrain</dc:creator>
      <dc:date>2013-10-04T20:35:58Z</dc:date>
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