<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: IMX8MP Inline ECC in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374724#M245451</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/255264"&gt;@James33&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;你是自己手动修改的寄存器的值吗？&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
    <pubDate>Tue, 02 Jun 2026 02:48:08 GMT</pubDate>
    <dc:creator>pengyong_zhang</dc:creator>
    <dc:date>2026-06-02T02:48:08Z</dc:date>
    <item>
      <title>IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2369962#M245318</link>
      <description>&lt;P&gt;Dear NXP Technical Support Team,&lt;/P&gt;&lt;P&gt;I am currently attempting to utilize the Inline ECC feature on the IMX8MP(Follow the steps in AN13566.pdf and &lt;A href="https://community.nxp.com/t5/NXP-Tech-Blog/%E3%82%A4%E3%83%B3%E3%83%A9%E3%82%A4%E3%83%B3ECC-%E6%A9%9F%E8%83%BD%E3%81%A8%E5%AE%9F%E8%A3%85%E6%96%B9%E6%B3%95%E3%81%AB%E3%81%A4%E3%81%84%E3%81%A6-%E6%97%A5%E6%9C%AC%E8%AA%9E%E3%83%96%E3%83%AD%E3%82%B0/ba-p/2259699" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/NXP-Tech-Blog/xxx&lt;/A&gt;&amp;nbsp;).&amp;nbsp;&amp;nbsp;According to section 9.2.5.1.20.3 of IMX8MPRM.pdf, I attempted to set ecc_region_parity_lock to Unlocked.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;I modified the content of lpddr4_timing.c and set the value of the 0x3d400074 register to 0x780.&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d400304, 0x1},
{0x3d400030, 0x1},
{0x3d400000, 0xa3080020},
{0x3d400020, 0x1323},
{0x3d400024, 0x1e84800},
{0x3d400064, 0x7a0118},
{0x3d400070, 0x070277D4},
{0x3d400074, 0x780},
......&lt;/LI-CODE&gt;&lt;P&gt;However, the register value read via the memtool tool is 0x790.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;root@imx8mp-lpddr4-evk:~# /unit_tests/memtool 0x3d400074 1
E
Reading 0x1 count starting at address 0x3D400074

0x3D400074: 00000790&lt;/LI-CODE&gt;&lt;P&gt;I would like to know how to properly configure this register.&lt;BR /&gt;&lt;BR /&gt;Thank you in advance for your support.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 22 May 2026 06:19:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2369962#M245318</guid>
      <dc:creator>James33</dc:creator>
      <dc:date>2026-05-22T06:19:32Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2370483#M245332</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/255264"&gt;@James33&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please share your modified RPA file.&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Mon, 25 May 2026 01:40:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2370483#M245332</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2026-05-25T01:40:47Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2370944#M245347</link>
      <description>&lt;P&gt;Thank you for your support！&lt;/P&gt;</description>
      <pubDate>Tue, 26 May 2026 01:07:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2370944#M245347</guid>
      <dc:creator>James33</dc:creator>
      <dc:date>2026-05-26T01:07:11Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374706#M245450</link>
      <description>Hello!!!&lt;BR /&gt;</description>
      <pubDate>Tue, 02 Jun 2026 02:23:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374706#M245450</guid>
      <dc:creator>James33</dc:creator>
      <dc:date>2026-06-02T02:23:37Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374724#M245451</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/255264"&gt;@James33&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;你是自己手动修改的寄存器的值吗？&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jun 2026 02:48:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374724#M245451</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2026-06-02T02:48:08Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP Inline ECC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374755#M245452</link>
      <description>&lt;P&gt;The lpddr4_timing.c file was generated by a DDR tool( * Code generated with DDR Tool v4.0.0_10-1eade933a.). The default value of this register is 0x790. According to the description in AN13566, section 3.2.3, I wanted to access the ECC parity region, so I manually changed it to 0x780, but it didn't work.&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/*
 * Copyright 2026 NXP
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 * Code generated with DDR Tool v4.0.0_10-1eade933a.
 * DDR PHY FW2020.06 
 * Part number: NXP LPDDR4 EVK board's default DDR part
 */

#include &amp;lt;linux/kernel.h&amp;gt;
#include &amp;lt;asm/arch/ddr.h&amp;gt;

/* Initialize DDRC registers */
struct dram_cfg_param ddr_ddrc_cfg[] = {
    {0x3d400304, 0x1},
    {0x3d400030, 0x1},
    {0x3d400000, 0xa3080020},
    {0x3d400020, 0x1323},
    {0x3d400024, 0x1e84800},
    {0x3d400064, 0x7a0118},
    {0x3d400070, 0x7027fd4},
    {0x3d400074, 0x790},
    {0x3d4000d0, 0xc00307a3},
    {0x3d4000d4, 0xc50000},
    {0x3d4000dc, 0xf4003f},
    {0x3d4000e0, 0x330000},
    {0x3d4000e8, 0x660048},
    {0x3d4000ec, 0x160048},
    {0x3d400100, 0x2028222a},
    {0x3d400104, 0x8083f},
    {0x3d40010c, 0xe0e000},
    {0x3d400110, 0x12040a12},
    {0x3d400114, 0x2050f0f},
    {0x3d400118, 0x1010009},
    {0x3d40011c, 0x502},
    {0x3d400130, 0x20800},
    {0x3d400134, 0xe100002},
    {0x3d400138, 0x120},
    {0x3d400144, 0xc80064},
    {0x3d400180, 0x3e8001e},
    {0x3d400184, 0x3207a12},
    {0x3d400188, 0x0},
    {0x3d400190, 0x49f820e},
    {0x3d400194, 0x80303},
    {0x3d4001b4, 0x1f0e},
    {0x3d4001a0, 0xe0400018},
    {0x3d4001a4, 0xdf00e4},
    {0x3d4001a8, 0x80000000},
    {0x3d4001b0, 0x11},
    {0x3d4001c0, 0x1},
    {0x3d4001c4, 0x1},
    {0x3d4000f4, 0x799},
    {0x3d400108, 0x9121b1c},
    {0x3d400200, 0x14},
    {0x3d400208, 0x0},
    {0x3d40020c, 0x14141400},
    {0x3d400210, 0x1f1f},
    {0x3d400204, 0x50505},
    {0x3d400214, 0x4040404},
    {0x3d400218, 0x4040404},
    {0x3d40021c, 0xf0f},
    {0x3d400250, 0x1705},
    {0x3d400254, 0x2c},
    {0x3d40025c, 0x4000030},
    {0x3d400264, 0x900093e7},
    {0x3d40026c, 0x2005574},
    {0x3d400400, 0x111},
    {0x3d400404, 0x72ff},
    {0x3d400408, 0x72ff},
    {0x3d400494, 0x2100e07},
    {0x3d400498, 0x620096},
    {0x3d40049c, 0x1100e07},
    {0x3d4004a0, 0xc8012c},
    {0x3d402020, 0x1021},
    {0x3d402024, 0x30d400},
    {0x3d402050, 0x20d000},
    {0x3d402064, 0xc001c},
    {0x3d4020dc, 0x840000},
    {0x3d4020e0, 0x330000},
    {0x3d4020e8, 0x660048},
    {0x3d4020ec, 0x160048},
    {0x3d402100, 0xa040305},
    {0x3d402104, 0x30407},
    {0x3d402108, 0x203060b},
    {0x3d40210c, 0x505000},
    {0x3d402110, 0x2040202},
    {0x3d402114, 0x2030202},
    {0x3d402118, 0x1010004},
    {0x3d40211c, 0x302},
    {0x3d402130, 0x20300},
    {0x3d402134, 0xa100002},
    {0x3d402138, 0x1d},
    {0x3d402144, 0x14000a},
    {0x3d402180, 0x640004},
    {0x3d402190, 0x3818200},
    {0x3d402194, 0x80303},
    {0x3d4021b4, 0x100},
    {0x3d4020f4, 0x599},
    {0x3d403020, 0x1021},
    {0x3d403024, 0xc3500},
    {0x3d403050, 0x20d000},
    {0x3d403064, 0x30007},
    {0x3d4030dc, 0x840000},
    {0x3d4030e0, 0x330000},
    {0x3d4030e8, 0x660048},
    {0x3d4030ec, 0x160048},
    {0x3d403100, 0xa010102},
    {0x3d403104, 0x30404},
    {0x3d403108, 0x203060b},
    {0x3d40310c, 0x505000},
    {0x3d403110, 0x2040202},
    {0x3d403114, 0x2030202},
    {0x3d403118, 0x1010004},
    {0x3d40311c, 0x302},
    {0x3d403130, 0x20300},
    {0x3d403134, 0xa100002},
    {0x3d403138, 0x8},
    {0x3d403144, 0x50003},
    {0x3d403180, 0x190004},
    {0x3d403190, 0x3818200},
    {0x3d403194, 0x80303},
    {0x3d4031b4, 0x100},
    {0x3d4030f4, 0x599},
    {0x3d400028, 0x0},
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;Thank you for your reply.&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jun 2026 03:57:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Inline-ECC/m-p/2374755#M245452</guid>
      <dc:creator>James33</dc:creator>
      <dc:date>2026-06-02T03:57:27Z</dc:date>
    </item>
  </channel>
</rss>

