IMX8MP Inline ECC

James33 — Fri, 22 May 2026 06:19:32 GMT

Dear NXP Technical Support Team,

I am currently attempting to utilize the Inline ECC feature on the IMX8MP(Follow the steps in AN13566.pdf and https://community.nxp.com/t5/NXP-Tech-Blog/xxx ). According to section 9.2.5.1.20.3 of IMX8MPRM.pdf, I attempted to set ecc_region_parity_lock to Unlocked.

I modified the content of lpddr4_timing.c and set the value of the 0x3d400074 register to 0x780.

struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400304, 0x1}, {0x3d400030, 0x1}, {0x3d400000, 0xa3080020}, {0x3d400020, 0x1323}, {0x3d400024, 0x1e84800}, {0x3d400064, 0x7a0118}, {0x3d400070, 0x070277D4}, {0x3d400074, 0x780}, ......

However, the register value read via the memtool tool is 0x790.

root@imx8mp-lpddr4-evk:~# /unit_tests/memtool 0x3d400074 1 E Reading 0x1 count starting at address 0x3D400074 0x3D400074: 00000790

I would like to know how to properly configure this register.

Thank you in advance for your support.

Re: IMX8MP Inline ECC

pengyong_zhang — Mon, 25 May 2026 01:40:47 GMT

Hi @James33

Please share your modified RPA file.

B.R

Re: IMX8MP Inline ECC

James33 — Tue, 26 May 2026 01:07:11 GMT

Thank you for your support！

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IMX8MP Inline ECC

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Re: IMX8MP Inline ECC