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    <title>i.MX ProcessorsのトピックRe: FRDM-MX95 5 sai?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2363631#M245188</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/261393"&gt;@FlynHawaiian&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;SAI1-5 can be connected to the following pads&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI1:&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;I2C2_SCL / I2C2_SDA&lt;BR /&gt;UART2_RXD&lt;BR /&gt;SAI1_TXFS / SAI1_TXC / SAI1_TXD0 / SAI1_RXD0&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI2:&lt;/STRONG&gt; IMX95_PAD_ENET2_XXX/IMX95_PAD_XSPI1_XXX&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI3:&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO12&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO16 ~ GPIO_IO21&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO26&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI4:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_TD[2:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_RXC&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_RD[1:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DATA[3:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SCLK&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SS0_B&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI5:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;SD3_CLK / SD3_CMD / SD3_DATA[3:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DATA[7:4]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DQS&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SS1_B&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Next, let’s look at the device tree configuration in FRDM（arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts）.&lt;/P&gt;
&lt;DIV&gt;
&lt;TABLE&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TH width="70.1625px" height="96px"&gt;SAI Module&lt;/TH&gt;
&lt;TH width="189.438px" height="96px"&gt;Can it be fully muxed out currently?&lt;/TH&gt;
&lt;TH width="478.8px" height="96px"&gt;Main Reason&lt;/TH&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI1&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;Some SAI1 PADs are occupied by &lt;CODE&gt;lpi2c2&lt;/CODE&gt; and &lt;CODE&gt;mqs1&lt;/CODE&gt;&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI2&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;Basically no&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The main PAD group &lt;CODE&gt;ENET2_*&lt;/CODE&gt; is occupied by Ethernet and MDIO&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI3&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;Yes, recommended&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The related &lt;CODE&gt;GPIO_IO&lt;/CODE&gt; PADs are not occupied in the current DTS&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI4&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The main PAD group &lt;CODE&gt;ENET2_*&lt;/CODE&gt; is occupied by Ethernet, and some &lt;CODE&gt;XSPI1&lt;/CODE&gt; PADs are also occupied by GPIO functions&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI5&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;&lt;CODE&gt;SD3_*&lt;/CODE&gt; is occupied by &lt;CODE&gt;usdhc3&lt;/CODE&gt; / WiFi SDIO, and some &lt;CODE&gt;XSPI1&lt;/CODE&gt; PADs are also occupied&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;/DIV&gt;
&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
    <pubDate>Tue, 12 May 2026 00:39:29 GMT</pubDate>
    <dc:creator>Zhiming_Liu</dc:creator>
    <dc:date>2026-05-12T00:39:29Z</dc:date>
    <item>
      <title>FRDM-MX95 5 sai?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2362769#M245171</link>
      <description>&lt;P&gt;I am wondering if it’s possible to enable all 5 of the SAI channels on the frdm or what the limitation is on the FRDM-MX95. &amp;nbsp;I’m also wondering how you configure them. &amp;nbsp;I plan to use Android automotive as the OS or Yocto, just unsure which yet.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 10 May 2026 07:01:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2362769#M245171</guid>
      <dc:creator>FlynHawaiian</dc:creator>
      <dc:date>2026-05-10T07:01:38Z</dc:date>
    </item>
    <item>
      <title>Re: FRDM-MX95 5 sai?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2363631#M245188</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/261393"&gt;@FlynHawaiian&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;SAI1-5 can be connected to the following pads&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI1:&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;I2C2_SCL / I2C2_SDA&lt;BR /&gt;UART2_RXD&lt;BR /&gt;SAI1_TXFS / SAI1_TXC / SAI1_TXD0 / SAI1_RXD0&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI2:&lt;/STRONG&gt; IMX95_PAD_ENET2_XXX/IMX95_PAD_XSPI1_XXX&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI3:&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO12&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO16 ~ GPIO_IO21&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;GPIO_IO26&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI4:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_TD[2:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_RXC&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;ENET2_RD[1:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DATA[3:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SCLK&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SS0_B&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;SAI5:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;SD3_CLK / SD3_CMD / SD3_DATA[3:0]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DATA[7:4]&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_DQS&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;XSPI1_SS1_B&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Next, let’s look at the device tree configuration in FRDM（arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts）.&lt;/P&gt;
&lt;DIV&gt;
&lt;TABLE&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TH width="70.1625px" height="96px"&gt;SAI Module&lt;/TH&gt;
&lt;TH width="189.438px" height="96px"&gt;Can it be fully muxed out currently?&lt;/TH&gt;
&lt;TH width="478.8px" height="96px"&gt;Main Reason&lt;/TH&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI1&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;Some SAI1 PADs are occupied by &lt;CODE&gt;lpi2c2&lt;/CODE&gt; and &lt;CODE&gt;mqs1&lt;/CODE&gt;&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI2&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;Basically no&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The main PAD group &lt;CODE&gt;ENET2_*&lt;/CODE&gt; is occupied by Ethernet and MDIO&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI3&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;Yes, recommended&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The related &lt;CODE&gt;GPIO_IO&lt;/CODE&gt; PADs are not occupied in the current DTS&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI4&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;The main PAD group &lt;CODE&gt;ENET2_*&lt;/CODE&gt; is occupied by Ethernet, and some &lt;CODE&gt;XSPI1&lt;/CODE&gt; PADs are also occupied by GPIO functions&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TH scope="row" width="70.1625px" height="52px"&gt;&lt;STRONG&gt;SAI5&lt;/STRONG&gt;&lt;/TH&gt;
&lt;TD width="189.438px" height="52px"&gt;No, only partially&lt;/TD&gt;
&lt;TD width="478.8px" height="52px"&gt;&lt;CODE&gt;SD3_*&lt;/CODE&gt; is occupied by &lt;CODE&gt;usdhc3&lt;/CODE&gt; / WiFi SDIO, and some &lt;CODE&gt;XSPI1&lt;/CODE&gt; PADs are also occupied&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;/DIV&gt;
&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Tue, 12 May 2026 00:39:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2363631#M245188</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2026-05-12T00:39:29Z</dc:date>
    </item>
    <item>
      <title>Re: FRDM-MX95 5 sai?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2363714#M245190</link>
      <description>&lt;P&gt;so basically sai3 is the only possible for full functionality?&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Is there a gui program where I can see the device tree and modify what each gpio I would want to be?&lt;/P&gt;&lt;P&gt;Would it be possible to set it to TDM mode, and send the audio to an analog devices adsp-&lt;SPAN&gt;21594, and let it handle the audio inputs from other devices and the main output?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Do you know what the audio output is from the sai3 tdm stream? Is it 32/768?&lt;/P&gt;</description>
      <pubDate>Tue, 12 May 2026 04:39:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FRDM-MX95-5-sai/m-p/2363714#M245190</guid>
      <dc:creator>FlynHawaiian</dc:creator>
      <dc:date>2026-05-12T04:39:53Z</dc:date>
    </item>
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