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    <title>topic Re: How to exchange data buffers between processors in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2339906#M244649</link>
    <description>&lt;P&gt;Hi：&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your reply. I have resolved the issue. I use RPMsg to send control commands and status. For large amounts of data, the M4 core copies it to memory via SDMA, and then the A core directly copies it from the corresponding shared address.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 26 Mar 2026 09:07:11 GMT</pubDate>
    <dc:creator>Eddy1</dc:creator>
    <dc:date>2026-03-26T09:07:11Z</dc:date>
    <item>
      <title>How to exchange data buffers between processors</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2338007#M244610</link>
      <description>&lt;P&gt;Hi:&lt;/P&gt;&lt;P&gt;I'm currently working on the communication between M7 and A55 on the i.MX8MP platform. Due to the large amount of data being transferred, the officially provided RPMsg demo does not meet the requirements. However, I have seen examples of DDR buffer on other platforms. Please refer to the attachment. Is there anything similar from NXP？&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 24 Mar 2026 01:37:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2338007#M244610</guid>
      <dc:creator>Eddy1</dc:creator>
      <dc:date>2026-03-24T01:37:12Z</dc:date>
    </item>
    <item>
      <title>Re: How to exchange data buffers between processors</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2338042#M244613</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/136546"&gt;@Eddy1&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;rpmsg本身就是基于DDR实现的数据交换。关于增大payload数据量，可以参考下面这个文章。&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Modify-RPMSG-buffer-payload-size/ta-p/1799540" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Modify-RPMSG-buffer-payload-size/ta-p/1799540&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Tue, 24 Mar 2026 02:54:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2338042#M244613</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2026-03-24T02:54:08Z</dc:date>
    </item>
    <item>
      <title>Re: How to exchange data buffers between processors</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2339906#M244649</link>
      <description>&lt;P&gt;Hi：&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your reply. I have resolved the issue. I use RPMsg to send control commands and status. For large amounts of data, the M4 core copies it to memory via SDMA, and then the A core directly copies it from the corresponding shared address.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 26 Mar 2026 09:07:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-exchange-data-buffers-between-processors/m-p/2339906#M244649</guid>
      <dc:creator>Eddy1</dc:creator>
      <dc:date>2026-03-26T09:07:11Z</dc:date>
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