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    <title>topic iMX95: Two video inputs and two video outputs. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327140#M244324</link>
    <description>&lt;P&gt;Good afternoon!&lt;/P&gt;&lt;P&gt;We have a project where we want to use the iMX95, but we need two video inputs and two video outputs. For the inputs, we want to use the two MIPI-CSI inputs. Regarding the video outputs, we want to use the two LVDS outputs, since with two MIPI-CSI inputs we can't use the MIPI-DSI output (due to the MIPI-DSI/CSI combo).&lt;/P&gt;&lt;P&gt;We have several questions about the LVDS outputs, as we want one output to go to an LCD (480x272) and the other to an LVDS-to-HDMI bridge. Here are our questions so far:&lt;/P&gt;&lt;P&gt;1. Is it possible to do what we've described for the outputs? That is, one LVDS output to the LCD and the other LVDS output to the LVDS-to-HDMI bridge.&lt;/P&gt;&lt;P&gt;2. Which LVDS-to-HDMI bridge would you recommend? We've seen the IT6263 chip, is it correct? Are there any others?&lt;/P&gt;&lt;P&gt;3. We need the HDMI output after the "LVDS to HDMI" bridge to support the following formats: 720p50/59/60, 1080p50/59/60, PAL, NTSC and 1080i50/59/60. Is it possible to reach 1080p60? Is it possible to support interlaced formats outputting through the iMX95's LVDS and with the "LVDS to HDMI" bridge?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 05 Mar 2026 13:19:51 GMT</pubDate>
    <dc:creator>danielsan-77</dc:creator>
    <dc:date>2026-03-05T13:19:51Z</dc:date>
    <item>
      <title>iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327140#M244324</link>
      <description>&lt;P&gt;Good afternoon!&lt;/P&gt;&lt;P&gt;We have a project where we want to use the iMX95, but we need two video inputs and two video outputs. For the inputs, we want to use the two MIPI-CSI inputs. Regarding the video outputs, we want to use the two LVDS outputs, since with two MIPI-CSI inputs we can't use the MIPI-DSI output (due to the MIPI-DSI/CSI combo).&lt;/P&gt;&lt;P&gt;We have several questions about the LVDS outputs, as we want one output to go to an LCD (480x272) and the other to an LVDS-to-HDMI bridge. Here are our questions so far:&lt;/P&gt;&lt;P&gt;1. Is it possible to do what we've described for the outputs? That is, one LVDS output to the LCD and the other LVDS output to the LVDS-to-HDMI bridge.&lt;/P&gt;&lt;P&gt;2. Which LVDS-to-HDMI bridge would you recommend? We've seen the IT6263 chip, is it correct? Are there any others?&lt;/P&gt;&lt;P&gt;3. We need the HDMI output after the "LVDS to HDMI" bridge to support the following formats: 720p50/59/60, 1080p50/59/60, PAL, NTSC and 1080i50/59/60. Is it possible to reach 1080p60? Is it possible to support interlaced formats outputting through the iMX95's LVDS and with the "LVDS to HDMI" bridge?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 05 Mar 2026 13:19:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327140#M244324</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-05T13:19:51Z</dc:date>
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    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327268#M244331</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;1. Yes, it is possible.&lt;/P&gt;
&lt;P&gt;2. IT6263 is the only chip that have been tested in our reference design, other LVDS-to-HDMI chips should work.&lt;/P&gt;
&lt;P&gt;3. i.MX95 supports up to 2x 1080p60 LVDS Tx (2x 4-lane or 1x 8-lane), interlaced formats are not supported in out BSP and should be implemented in your side.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Thu, 05 Mar 2026 17:56:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327268#M244331</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2026-03-05T17:56:23Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327644#M244344</link>
      <description>&lt;P&gt;Thanks for the replies!&lt;/P&gt;&lt;P&gt;Regarding interlaced format support for HDMI output... Would interlaced formats be supported if we use a MIPI-DSI to HDMI bridge, or would it be the same problem as if we used an LVDS to HDMI bridge?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 06 Mar 2026 08:33:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327644#M244344</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-06T08:33:14Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327934#M244351</link>
      <description>&lt;P&gt;Thanks for the replies!&lt;/P&gt;&lt;P&gt;Regarding interlaced format support for HDMI output... Would interlaced formats be supported if we use a MIPI-DSI to HDMI bridge, or would it be the same problem as if we used an LVDS to HDMI bridge?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Daniel.&lt;/P&gt;</description>
      <pubDate>Fri, 06 Mar 2026 12:00:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2327934#M244351</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-06T12:00:00Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2328036#M244352</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;It will be the same problem as if you used an LVDS to HDMI bridge since&amp;nbsp;interlaced formats are not implemented in our BSP.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Fri, 06 Mar 2026 15:58:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2328036#M244352</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2026-03-06T15:58:15Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2328700#M244371</link>
      <description>&lt;P&gt;Thank you!&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2026 07:34:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2328700#M244371</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-09T07:34:11Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329077#M244394</link>
      <description>&lt;P&gt;Once the questions regarding the outputs were clarified (thank you very much), we would like to clarify some points about the two inputs.&lt;/P&gt;&lt;P&gt;First, I'll explain our idea and then ask the questions. We want to use the two MIPI-CSI inputs of the iMX95: one connected to the TC358743 chip and the other to the TC358748 chip. For both inputs, we want to support the following formats: 720p50/59/60, 1080p50/59/60, PAL, NTSC, and 1080i50/59/60.&lt;/P&gt;&lt;P&gt;This setup raises the following questions:&lt;/P&gt;&lt;P&gt;1. Is it possible to do what we've described for the inputs? That is, one MIPI-CSI input from the TC358743 and the other MIPI-CSI input from the TC358748, and both of them can support different video formats.&lt;/P&gt;&lt;P&gt;2. Are there any drivers available that support these two chips: TC358743 and TC358748?&lt;/P&gt;&lt;P&gt;3. Do the MIPI-CSI inputs also support the interlaced formats PAL, NTSC, and 1080i50/59/60? If so, how would this be done, using so-called "virtual channels"? The documentation seems to support interlacing in MIPI-CSI inputs ("CSI Pixel Formatter (CSI_PIXEL_FORMATTING)" =&amp;gt; "Supports Interlace mode for YUV/RGB data types"), but we're asking to confirm.&lt;/P&gt;&lt;P&gt;4. We can't use YUV422 with the TC358743 chip's MIPI-CSI interface due to the chip's limitations for interlaced data. We were thinking of using the YUV444 format but sending it via the MIPI-CSI interface as if it were RGB, and then probably having to change the software (driver). Is this possible? Would the software (driver, etc.) be ready, or would we have to do it ourselves?&lt;/P&gt;&lt;P&gt;5. We want to route the input from one of the two MIPI-CSI interfaces to an H264/HEVC video encoder, but this encoder requires YUV420, while the MIPI-CSI interface is YUV422 (or YUV444). According to the documentation, it seems possible using the "HW" module "CSC from YUV422/YUV444/RGB 8-bit". Is this CSC the one from the ISI module, or is it a different one? Can this conversion be done using the CSC, or would the YUV422/YUV444 to YUV420 conversion have to be done in software?&lt;/P&gt;&lt;P&gt;6. Continuing with the previous question, and considering sending the video decoder output to LVDS, which would require a YUV420 (decoder) to RGB (LVDS) conversion... Would this conversion (YUV420 to RGB) be possible using a hardware module (perhaps with the Display Controller's "Blit controller") or would it have to be done in software?&lt;/P&gt;&lt;P&gt;7. Speaking of color conversions, we also have a question about the support and use of BT601 and BT709. Are they supported in any hardware conversion, or do they depend on a specific coefficient configuration, or something else?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2026 15:27:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329077#M244394</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-09T15:27:01Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329082#M244395</link>
      <description>&lt;P&gt;And a new question:&lt;/P&gt;&lt;P&gt;8. We need the number of lanes on the MIPI-CSI interface to be dynamically configurable. Is that possible?&lt;/P&gt;&lt;P&gt;Thanks, Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2026 15:30:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329082#M244395</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-09T15:30:51Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329747#M244415</link>
      <description>&lt;P&gt;Can someone help me with the last 8 questions?&lt;/P&gt;&lt;P&gt;Thank you very much,&lt;BR /&gt;Daniel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 11:27:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329747#M244415</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-10T11:27:10Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329983#M244417</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Regarding these new questions about the inputs, I recommend creating a new community thread or submitting a &lt;A href="https://support.nxp.com/s/?language=en_US" target="_self"&gt;support ticket&lt;/A&gt;.&lt;/P&gt;
&lt;P&gt;This will help keep each thread focused on a single topic.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 16:44:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2329983#M244417</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2026-03-10T16:44:21Z</dc:date>
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      <title>Re: iMX95: Two video inputs and two video outputs.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2330346#M244430</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Thanks! You're right, I'll start a new thread with these questions.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2026 07:33:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX95-Two-video-inputs-and-two-video-outputs/m-p/2330346#M244430</guid>
      <dc:creator>danielsan-77</dc:creator>
      <dc:date>2026-03-11T07:33:36Z</dc:date>
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