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    <title>topic Re: iMX8mp - Port from Mickledore to Walnascar, how to have v4l2 cached buffers for csi2 image buffe in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2322831#M244186</link>
    <description>&lt;P&gt;how about using dmabuf? the command like&amp;nbsp;&lt;/P&gt;
&lt;P&gt;$ gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 io-mode=dmabuf ! \&lt;BR /&gt;'video/x-raw,format=(string)NV12,width=1920,height=1080,framerate=(fraction)30/1' ! \&lt;BR /&gt;queue ! v4l2h264enc output-io-mode=dmabuf-import ! avimux ! filesink location=test.avi&lt;/P&gt;</description>
    <pubDate>Thu, 26 Feb 2026 03:05:06 GMT</pubDate>
    <dc:creator>joanxie</dc:creator>
    <dc:date>2026-02-26T03:05:06Z</dc:date>
    <item>
      <title>iMX8mp - Port from Mickledore to Walnascar, how to have v4l2 cached buffers for csi2 image buffers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2322690#M244179</link>
      <description>&lt;P&gt;we had a special port of USERPTR mode and g2d that gave us cached performance where we would copy from the V4L2 capture buffer into our shared memory with decent copy speed.&lt;BR /&gt;&lt;BR /&gt;moving to latest version none of that works now and I'm having issues. before i try and do bad things to the kernel i want to know if there is a better way.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;How is everyone getting good performance from V4L2 buffers from camera?&lt;BR /&gt;&lt;BR /&gt;My 2MP image is like ~2ms copy time with all the old cache workarounds.&lt;BR /&gt;&lt;BR /&gt;But its horrible product ruining speed without it.&lt;BR /&gt;The new OS is making old trick nearly impossible to do now. so what are people doing to not have the camera be ultra slow now?&lt;BR /&gt;would love a patch or code example of how they are getting cached copy speed from source buffer containing captured image.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Feb 2026 20:03:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2322690#M244179</guid>
      <dc:creator>JesterOfHw</dc:creator>
      <dc:date>2026-02-25T20:03:21Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8mp - Port from Mickledore to Walnascar, how to have v4l2 cached buffers for csi2 image buffe</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2322831#M244186</link>
      <description>&lt;P&gt;how about using dmabuf? the command like&amp;nbsp;&lt;/P&gt;
&lt;P&gt;$ gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 io-mode=dmabuf ! \&lt;BR /&gt;'video/x-raw,format=(string)NV12,width=1920,height=1080,framerate=(fraction)30/1' ! \&lt;BR /&gt;queue ! v4l2h264enc output-io-mode=dmabuf-import ! avimux ! filesink location=test.avi&lt;/P&gt;</description>
      <pubDate>Thu, 26 Feb 2026 03:05:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2322831#M244186</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2026-02-26T03:05:06Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8mp - Port from Mickledore to Walnascar, how to have v4l2 cached buffers for csi2 image buffe</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2323888#M244201</link>
      <description>&lt;P&gt;yes this will be something to try. things to note...&lt;BR /&gt;This is a C++ app tightly coupled to a single shot triggered camera (not constant streaming).&lt;BR /&gt;cache performance of the image buffer is a big deal. total image processing time is counting milliseconds here so none can be thrown away. we copy the image out of the v4l buffer into shared memory which is also cached. i have not tried the DMABUF type yet. but i will when i can rewrite our camera interface to try.&lt;/P&gt;</description>
      <pubDate>Thu, 26 Feb 2026 16:26:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8mp-Port-from-Mickledore-to-Walnascar-how-to-have-v4l2-cached/m-p/2323888#M244201</guid>
      <dc:creator>JesterOfHw</dc:creator>
      <dc:date>2026-02-26T16:26:58Z</dc:date>
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