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    <title>topic Re: imx8mp U-boot ramoops memory in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322099#M244168</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Did you add the .dts node for that? please refer to the following example of implementation:&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://embear.ch/posts/using-ramoops/" target="_blank"&gt;https://embear.ch/posts/using-ramoops/&lt;/A&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 24 Feb 2026 20:05:10 GMT</pubDate>
    <dc:creator>Oswalag</dc:creator>
    <dc:date>2026-02-24T20:05:10Z</dc:date>
    <item>
      <title>imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322086#M244167</link>
      <description>&lt;P&gt;Dear support!&lt;/P&gt;&lt;P&gt;What I wanted to achieve is to get the persistent memory which could be used for ramoops storage. So I did some testing in U-boot, but each of the memory address which I used was "scrambled" after reset. I tried &lt;EM&gt;reset&lt;/EM&gt; or &lt;EM&gt;reset -w&lt;/EM&gt; commands, but nothing helped. Here is the example of my test:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;u-boot=&amp;gt; mw 55100000 10
u-boot=&amp;gt; md 55100000
55100000: 00000010 ffffffff ffffffff ffffffff ................
55100010: ffffffff ffffffff ffffffff ffffffff ................
...
u-boot=&amp;gt; reset
resetting ...&lt;/LI-CODE&gt;&lt;LI-CODE lang="c"&gt;U-Boot SPL 2024.04-4fa57eaf6dd (Feb 19 2026 - 12:49:01 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 4000MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
DDR configured as dual rank
SEC0: RNG instantiated
Normal Boot
Trying to boot from BOOTROM
Boot Stage: Primary boot Find img info 0x48025a00, size 888
Need continue download 1024
NOTICE: Do not release JR0 to NS as it can be used by HAB
NOTICE: BL31: v2.10.0 (release):android-14.0.0_2.2.0-rc2-0-g7c64d4e86
NOTICE: BL31: Built : 10:35:32, Aug 29 2024

U-Boot 2024.04-4fa57eaf6dd (Feb 19 2026 - 12:49:01 +0000)
CPU: i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 60C
Reset cause: POR
DRAM: 4 GiB
...
u-boot=&amp;gt; md 55100000
55100000: ffffffff ffffffff ffffffff ffffffff ................
55100010: ffffffff ffffffff ffffffff ffffffff ................
...&lt;/LI-CODE&gt;&lt;P&gt;Who/where the memory "scrambled" then? ATF, SPL, PMIC or? Which address could be used? Is it even possible to do it on imx8mp machine?&lt;/P&gt;&lt;P&gt;Many thanks,&lt;BR /&gt;Andy&lt;/P&gt;</description>
      <pubDate>Tue, 24 Feb 2026 18:47:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322086#M244167</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2026-02-24T18:47:54Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322099#M244168</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Did you add the .dts node for that? please refer to the following example of implementation:&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://embear.ch/posts/using-ramoops/" target="_blank"&gt;https://embear.ch/posts/using-ramoops/&lt;/A&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 24 Feb 2026 20:05:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322099#M244168</guid>
      <dc:creator>Oswalag</dc:creator>
      <dc:date>2026-02-24T20:05:10Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322416#M244173</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Sure, I started with using it with correct way via DTB in Linux. But when I rebooted the board, nothing has been written into this section. So I was thinking someone has to "scramble" the memory. So I moved one level down into U-boot. There I also tried to define the "reserved-memory", but it didn't help. As I said, I tried multiple memory addresses (55110000, 944400000, ...) based on:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;3d800000-3dbfffff : 3d800000.ddr-pmu ddr-pmu@3d800000
40000000-54ffffff : System RAM
  48210000-4975ffff : Kernel code
  49760000-49adffff : reserved
  49ae0000-49d1ffff : Kernel data
  4ffed000-4fffcfff : reserved
55000000-5510ffff : reserved
55110000-553fffff : System RAM
55400000-554fffff : reserved
55500000-7fffffff : System RAM
80000000-80ffffff : reserved
81000000-923fffff : System RAM
92400000-943fffff : reserved
94400000-ffffffff : System RAM
  c0000000-ffffffff : reserved
100000000-10fffffff : reserved
  100000000-10fffffff : gcContMem
110000000-13fffffff : System RAM
  13b0ec000-13f7fffff : reserved
  13f827000-13f827fff : reserved
  13f82a000-13f82cfff : reserved
  13f82d000-13f841fff : reserved
  13f842000-13f88ffff : reserved
  13f890000-13fffffff : reserved&lt;/LI-CODE&gt;&lt;LI-CODE lang="c"&gt;reserved-memory {
	#address-cells = &amp;lt;2&amp;gt;;
	#size-cells = &amp;lt;2&amp;gt;;
	ranges;

	ramoops: ramoops@94400000 {
		compatible = "ramoops";
		reg = &amp;lt;0 0x94400000 0 0x00100000&amp;gt;; // 1MB at 0x94400000
		record-size = &amp;lt;0x10000&amp;gt;; // 64kB per record
		console-size = &amp;lt;0x10000&amp;gt;; // 64kB for console
		ftrace-size = &amp;lt;0x40000&amp;gt;; // 256kB for ftrace output
		pmsg-size = &amp;lt;0x10000&amp;gt;; // 64kB for user messages
	};
};&lt;/LI-CODE&gt;&lt;P&gt;I would say the problem has to be somewhere deeper, that the memory is reset, maybe PMIC? If yes, where/how to configure it to not do a DRAM power cycle.&lt;/P&gt;&lt;P&gt;BR,&lt;BR /&gt;Andy&lt;/P&gt;</description>
      <pubDate>Wed, 25 Feb 2026 09:14:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2322416#M244173</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2026-02-25T09:14:01Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2325664#M244258</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I understand, unfortunately ramoops is not implemented in our BSP,&amp;nbsp;&lt;SPAN&gt;toradex did it so it would be better if you ask them for the implementation on their BSP.&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 03 Mar 2026 16:29:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2325664#M244258</guid>
      <dc:creator>Oswalag</dc:creator>
      <dc:date>2026-03-03T16:29:26Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2326083#M244286</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;not sure if this a Toradex' related problem, while it could be somewhere in ATF or... which is a NXP part. On the other hand someone else was asking the same there&amp;nbsp;&lt;A href="https://community.toradex.com/t/pstore-and-ramoops-on-verdin-imx8mp-and-ivy-dev-board/29567/6" target="_self"&gt;https://community.toradex.com/t/pstore-and-ramoops-on-verdin-imx8mp-and-ivy-dev-board/29567/6&lt;/A&gt;&amp;nbsp;but no response... . Do you know where they did it then?&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Andy&lt;/P&gt;</description>
      <pubDate>Wed, 04 Mar 2026 09:01:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2326083#M244286</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2026-03-04T09:01:20Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp U-boot ramoops memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2339167#M244631</link>
      <description>&lt;P&gt;Ok, will answer it by myself.&lt;/P&gt;&lt;P&gt;Three components (U-Boot, Kernel and ATF) have to touched to make it really working.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;U-boot + Kernel (DTB)&lt;/LI&gt;&lt;/UL&gt;&lt;LI-CODE lang="c"&gt; &amp;amp;wdog1 {
-	 fsl,ext-reset-output;
+	 // fsl,ext-reset-output;
	 pinctrl-names = "default";
	 pinctrl-0 = &amp;lt;&amp;amp;pinctrl_wdog&amp;gt;;
	 status = "okay";&lt;/LI-CODE&gt;&lt;UL&gt;&lt;LI&gt;ATF (platform_def.h)&amp;nbsp;&lt;/LI&gt;&lt;/UL&gt;&lt;LI-CODE lang="c"&gt;- #define IMX_WDOG_B_RESET
+ // #define IMX_WDOG_B_RESET&lt;/LI-CODE&gt;&lt;P&gt;After that, ramoops should survive the reboot.&lt;/P&gt;&lt;P&gt;BR,&lt;BR /&gt;Andy&lt;/P&gt;</description>
      <pubDate>Wed, 25 Mar 2026 10:24:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-U-boot-ramoops-memory/m-p/2339167#M244631</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2026-03-25T10:24:09Z</dc:date>
    </item>
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